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Message-ID: <20160602160428.GR22049@tassilo.jf.intel.com>
Date: Thu, 2 Jun 2016 09:04:28 -0700
From: Andi Kleen <ak@...ux.intel.com>
To: David Carrillo-Cisneros <davidcc@...gle.com>
Cc: linux-kernel@...r.kernel.org, "x86@...nel.org" <x86@...nel.org>,
Ingo Molnar <mingo@...hat.com>,
"Yan, Zheng" <zheng.z.yan@...el.com>,
Kan Liang <kan.liang@...el.com>,
Peter Zijlstra <peterz@...radead.org>,
Stephane Eranian <eranian@...gle.com>
Subject: Re: [PATCH 1/3] perf/x86/intel: output LBR support statement after
validation
I don't think the context switch support is really needed. It's only
needed for saving/restoring LBRs, and we only do that with LBR callstacks.
In any other LBR mode that LBRs are only flushed on context switch
But LBR callstacks will never put kernel addresses into the LBRs
because they are forced to set a ring 3 filter. So you can't have
kernel addresses in the LBR when saving/restoring them
(unless I missed some case)
Dropping that will likely simplify the patch somewhat.
-Andi
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