linux-kernel - Re: [PART2 RFC v1 1/9] iommu/amd: Detect and enable guest vAPIC support

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Message-ID: <df9c87c7-b7d8-4de7-99a8-ad5ae133bf36@amd.com>
Date:	Thu, 2 Jun 2016 15:38:43 -0500
From:	Suravee Suthikulanit <suravee.suthikulpanit@....com>
To:	Joerg Roedel <joro@...tes.org>
CC:	<pbonzini@...hat.com>, <rkrcmar@...hat.com>, <bp@...en8.de>,
	<gleb@...nel.org>, <alex.williamson@...hat.com>,
	<kvm@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
	<wei@...hat.com>, <sherry.hurwitz@....com>
Subject: Re: [PART2 RFC v1 1/9] iommu/amd: Detect and enable guest vAPIC
 support

On 5/9/2016 6:49 AM, Joerg Roedel wrote:
> On Fri, Apr 08, 2016 at 07:49:22AM -0500, Suthikulpanit, Suravee wrote:
>> From: Suravee Suthikulpanit <suravee.suthikulpanit@....com>
>>
>> This patch introduces a new IOMMU driver parameter, amd_iommu_guest_ir,
>> which can be used to specify different interrupt remapping mode for
>> passthrough devices to VM guest:
>>     * legacy: Legacy interrupt remapping mode (w/ 32-bit IRTE)
>>     * ga    : Guest vAPIC interrupt remapping mode (w/ 128-bit IRTE)
>>
>> Note that the GA mode also supports legacy interrupt remapping
>> for non-passthrough devices with the 128-bit IRTE.
>
> Does this need to be under user control? The code can just check what
> the hardware supports and use the 128bit IRTEs if supported, no?
>
> 	Joerg

It does not need to be signified by user.

Currently, if the MMIO Offset 30h[GASup] bit (of IOMMU Extended Feature 
Register) is set, the driver should default to using the 128bit IRTE by 
setting MMIO Offset 0018h[GAEn] bit (of IOMMU Control Register). The 
default is also enabling GA mode (by setting MMIO 0018h[GAEn] if MMIO 
0030h[GASup] is set).

However, if SVM AVIC is not enabled, or if the AVIC HW cannot support 
the type of interrupt (e.g. multicast/broadcast), it falls back to use 
legacy  interrupt remapping mode w/ 128-bit IRTE.

This option is intended for the case when we want to force IOMMU to use 
legacy interrupt remapping (hence no need for 128-bit IRTE).

I will improve on the documentation in the next patch series.

Thanks,
Suravee