lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <87porzvv2s.fsf@skywalker.in.ibm.com>
Date:	Fri, 03 Jun 2016 08:26:43 +0530
From:	"Aneesh Kumar K.V" <aneesh.kumar@...ux.vnet.ibm.com>
To:	Andrew Morton <akpm@...ux-foundation.org>
Cc:	mpe@...erman.id.au, linux-mm@...ck.org,
	linux-kernel@...r.kernel.org,
	Benjamin Herrenschmidt <benh@...nel.crashing.org>
Subject: Re: [PATCH 4/4] powerpc/mm/radix: Implement tlb mmu gather flush efficiently

Andrew Morton <akpm@...ux-foundation.org> writes:

> On Thu,  2 Jun 2016 15:09:49 +0530 "Aneesh Kumar K.V" <aneesh.kumar@...ux.vnet.ibm.com> wrote:
>
>> Now that we track page size in mmu_gather, we can use address based
>> tlbie format when doing a tlb_flush(). We don't do this if we are
>> invalidating the full address space.
>> 
>> ...
>>
>>  void radix__tlb_flush(struct mmu_gather *tlb)
>>  {
>> +	int psize = 0;
>>  	struct mm_struct *mm = tlb->mm;
>> -	radix__flush_tlb_mm(mm);
>> +	int page_size = tlb->page_size;
>> +
>> +	psize = radix_get_mmu_psize(page_size);
>> +	if (psize == -1)
>> +		/* unknown page size */
>> +		goto flush_mm;
>> +
>> +	if (!tlb->fullmm && !tlb->need_flush_all)
>> +		radix__flush_tlb_range_psize(mm, tlb->start, tlb->end, psize);
>> +	else
>> +flush_mm:
>> +		radix__flush_tlb_mm(mm);
>
> That's kinda ugly.  What about
>
> void radix__tlb_flush(struct mmu_gather *tlb)
> {
> 	int psize = 0;
> 	struct mm_struct *mm = tlb->mm;
> 	int page_size = tlb->page_size;
>
> 	psize = radix_get_mmu_psize(page_size);
>
> 	if (psize != -1 && !tlb->fullmm && !tlb->need_flush_all)
> 		radix__flush_tlb_range_psize(mm, tlb->start, tlb->end, psize);
> 	else
> 		radix__flush_tlb_mm(mm);
> }
>
> ?
>
> We lost the comment, but that can be neatly addressed by documenting
> radix_get_mmu_psize() (of course!).  Please send along a comment to do
> this and I'll add it in.


I will update the patch. But this patch (Patch 4) need to go through
powerpc tree because radix__flush_tlb_range_psize is not yet upstream.
As I mentioned in the previous thread, if you can take patch 1 to patch 3 that
will enable wider testing w.r.t other archs and ppc64 related changes can
go later via powerpc tree ?

>
> --- a/arch/powerpc/mm/tlb-radix.c~powerpc-mm-radix-implement-tlb-mmu-gather-flush-efficiently-fix
> +++ a/arch/powerpc/mm/tlb-radix.c
> @@ -265,13 +265,9 @@ void radix__tlb_flush(struct mmu_gather
>  	int page_size = tlb->page_size;
>
>  	psize = radix_get_mmu_psize(page_size);
> -	if (psize == -1)
> -		/* unknown page size */
> -		goto flush_mm;
>
> -	if (!tlb->fullmm && !tlb->need_flush_all)
> +	if (psize != -1 && !tlb->fullmm && !tlb->need_flush_all)
>  		radix__flush_tlb_range_psize(mm, tlb->start, tlb->end, psize);
>  	else
> -flush_mm:
>  		radix__flush_tlb_mm(mm);
>  }
> _
>
> I'll await feedback from the other PPC developers before doing anything
> further on this patchset.
>
> hm, no ppc mailing lists were cc'ed.  Regrettable.

I missed that. I can resend the series again adding ppc-devel to cc: ?

-aneesh

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ