lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-ID: <1464937059-19349-1-git-send-email-hongtao.jia@nxp.com>
Date:	Fri, 3 Jun 2016 14:57:33 +0800
From:	Jia Hongtao <hongtao.jia@....com>
To:	<edubezval@...il.com>, <rui.zhang@...el.com>, <robh+dt@...nel.org>,
	<galak@...eaurora.org>, <scott.wood@....com>, <shawnguo@...nel.org>
CC:	<linux-pm@...r.kernel.org>, <devicetree@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>, <linuxppc-dev@...ts.ozlabs.org>,
	<linux-arm-kernel@...ts.infradead.org>, <hongtao.jia@....com>
Subject: [PATCH 1/7] dt-bindings: Update QorIQ TMU thermal bindings

For different types of SoC the sensor id and endianness may vary.
"#thermal-sensor-cells" is used to provide sensor id information.
"little-endian" property is to tell the endianness of TMU.

Signed-off-by: Jia Hongtao <hongtao.jia@....com>
---
 .../devicetree/bindings/thermal/qoriq-thermal.txt     | 19 +++++++++++++------
 1 file changed, 13 insertions(+), 6 deletions(-)

diff --git a/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt b/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
index 66223d5..8eeef80 100644
--- a/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
@@ -1,22 +1,28 @@
 * Thermal Monitoring Unit (TMU) on Freescale QorIQ SoCs
 
 Required properties:
-- compatible : Must include "fsl,qoriq-tmu". The version of the device is
+- compatible: Must include "fsl,qoriq-tmu". The version of the device is
 	determined by the TMU IP Block Revision Register (IPBRR0) at
 	offset 0x0BF8.
-	Table of correspondences between IPBRR0 values and example  chips:
+	Table of correspondences between IPBRR0 values and example chips:
 		Value           Device
 		----------      -----
 		0x01900102      T1040
-- reg : Address range of TMU registers.
-- interrupts : Contains the interrupt for TMU.
-- fsl,tmu-range : The values to be programmed into TTRnCR, as specified by
+- reg: Address range of TMU registers.
+- interrupts: Contains the interrupt for TMU.
+- fsl,tmu-range: The values to be programmed into TTRnCR, as specified by
 	the SoC reference manual. The first cell is TTR0CR, the second is
 	TTR1CR, etc.
-- fsl,tmu-calibration : A list of cell pairs containing temperature
+- fsl,tmu-calibration: A list of cell pairs containing temperature
 	calibration data, as specified by the SoC reference manual.
 	The first cell of each pair is the value to be written to TTCFGR,
 	and the second is the value to be written to TSCFGR.
+- #thermal-sensor-cells: Must be 1. The sensor specifier is the monitoring
+	site ID, and represents the "n" in TRITSRn and TRATSRn.
+
+Optional property:
+- little-endian: If present, the TMU registers are little endian.  If absent,
+	the default is big endian.
 
 Example:
 
@@ -60,4 +66,5 @@ tmu@...00 {
 
 			       0x00030000 0x00000012
 			       0x00030001 0x0000001d>;
+	#thermal-sensor-cells = <1>;
 };
-- 
2.1.0.27.g96db324

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ