| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <1464941524-3992-1-git-send-email-noltari@gmail.com>
Date: Fri, 3 Jun 2016 10:12:02 +0200
From: Álvaro Fernández Rojas
<noltari@...il.com>
To: linux-mips@...ux-mips.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, ralf@...ux-mips.org,
f.fainelli@...il.com, jogo@...nwrt.org, cernekee@...il.com,
robh@...nel.org, simon@...e.lp0.eu
Cc: Álvaro Fernández Rojas
<noltari@...il.com>
Subject: [PATCH 1/3] MIPS: BMIPS: Add device tree example for BCM63268
This adds a device tree example for Comtrend VR-3032u, which
also serves as a real example for brcm,bcm6328-leds.
Signed-off-by: Álvaro Fernández Rojas <noltari@...il.com>
---
arch/mips/bmips/Kconfig | 4 +
arch/mips/boot/dts/brcm/Makefile | 2 +
arch/mips/boot/dts/brcm/bcm63268.dtsi | 134 +++++++++++++++++++++++++++
arch/mips/boot/dts/brcm/bcm963268vr3032u.dts | 107 +++++++++++++++++++++
4 files changed, 247 insertions(+)
create mode 100644 arch/mips/boot/dts/brcm/bcm63268.dtsi
create mode 100644 arch/mips/boot/dts/brcm/bcm963268vr3032u.dts
diff --git a/arch/mips/bmips/Kconfig b/arch/mips/bmips/Kconfig
index 264328d..14f4b4c 100644
--- a/arch/mips/bmips/Kconfig
+++ b/arch/mips/bmips/Kconfig
@@ -21,6 +21,10 @@ config DT_BCM93384WVG_VIPER
bool "BCM93384WVG Viper CPU (EXPERIMENTAL)"
select BUILTIN_DTB
+config DT_BCM963268VR3032U
+ bool "BCM963268VR3032U"
+ select BUILTIN_DTB
+
config DT_BCM96358NB4SER
bool "BCM96358NB4SER"
select BUILTIN_DTB
diff --git a/arch/mips/boot/dts/brcm/Makefile b/arch/mips/boot/dts/brcm/Makefile
index fda9d38..2060e70 100644
--- a/arch/mips/boot/dts/brcm/Makefile
+++ b/arch/mips/boot/dts/brcm/Makefile
@@ -1,5 +1,6 @@
dtb-$(CONFIG_DT_BCM93384WVG) += bcm93384wvg.dtb
dtb-$(CONFIG_DT_BCM93384WVG_VIPER) += bcm93384wvg_viper.dtb
+dtb-$(CONFIG_DT_BCM963268VR3032U) += bcm963268vr3032u.dtb
dtb-$(CONFIG_DT_BCM96358NB4SER) += bcm96358nb4ser.dtb
dtb-$(CONFIG_DT_BCM96368MVWG) += bcm96368mvwg.dtb
dtb-$(CONFIG_DT_BCM9EJTAGPRB) += bcm9ejtagprb.dtb
@@ -15,6 +16,7 @@ dtb-$(CONFIG_DT_BCM97435SVMB) += bcm97435svmb.dtb
dtb-$(CONFIG_DT_NONE) += \
bcm93384wvg.dtb \
bcm93384wvg_viper.dtb \
+ bcm963268vr3032u.dtb \
bcm96358nb4ser.dtb \
bcm96368mvwg.dtb \
bcm9ejtagprb.dtb \
diff --git a/arch/mips/boot/dts/brcm/bcm63268.dtsi b/arch/mips/boot/dts/brcm/bcm63268.dtsi
new file mode 100644
index 0000000..7e6bf2c
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm63268.dtsi
@@ -0,0 +1,134 @@
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "brcm,bcm63268";
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mips-hpt-frequency = <200000000>;
+
+ cpu@0 {
+ compatible = "brcm,bmips4350";
+ device_type = "cpu";
+ reg = <0>;
+ };
+
+ cpu@1 {
+ compatible = "brcm,bmips4350";
+ device_type = "cpu";
+ reg = <1>;
+ };
+ };
+
+ clocks {
+ periph_clk: periph-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <50000000>;
+ };
+ };
+
+ aliases {
+ serial0 = &uart0;
+ serial1 = &uart1;
+ };
+
+ cpu_intc: interrupt-controller {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ ubus {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ compatible = "simple-bus";
+ ranges;
+
+ periph_cntl: syscon@...00000 {
+ compatible = "syscon";
+ reg = <0x10000000 0x14>;
+ native-endian;
+ };
+
+ reboot: syscon-reboot@...00008 {
+ compatible = "syscon-reboot";
+ regmap = <&periph_cntl>;
+ offset = <0x8>;
+ mask = <0x1>;
+ };
+
+ periph_intc: interrupt-controller@...00020 {
+ compatible = "brcm,bcm6345-l1-intc";
+ reg = <0x10000020 0x20>,
+ <0x10000040 0x20>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&cpu_intc>;
+ interrupts = <2>, <3>;
+ };
+
+ uart0: serial@...00180 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0x10000180 0x18>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <5>;
+
+ clocks = <&periph_clk>;
+
+ status = "disabled";
+ };
+
+ uart1: serial@...001a0 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0x100001a0 0x18>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <34>;
+
+ clocks = <&periph_clk>;
+
+ status = "disabled";
+ };
+
+ leds0: led-controller@...01900 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6328-leds";
+ reg = <0x10001900 0x24>;
+
+ status = "disabled";
+ };
+
+ ehci: usb@...02500 {
+ compatible = "brcm,bcm63268-ehci", "generic-ehci";
+ reg = <0x10002500 0x100>;
+ big-endian;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <10>;
+
+ status = "disabled";
+ };
+
+ ohci: usb@...02600 {
+ compatible = "brcm,bcm63268-ohci", "generic-ohci";
+ reg = <0x10002600 0x100>;
+ big-endian;
+ no-big-frame-no;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <9>;
+
+ status = "disabled";
+ };
+ };
+};
diff --git a/arch/mips/boot/dts/brcm/bcm963268vr3032u.dts b/arch/mips/boot/dts/brcm/bcm963268vr3032u.dts
new file mode 100644
index 0000000..930726f
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm963268vr3032u.dts
@@ -0,0 +1,107 @@
+/dts-v1/;
+
+/include/ "bcm63268.dtsi"
+
+/ {
+ compatible = "comtrend,vr-3032u", "brcm,bcm63268";
+ model = "Comtrend VR-3032u";
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x04000000>;
+ };
+
+ chosen {
+ stdout-path = &uart0;
+ };
+};
+
+&leds0 {
+ status = "ok";
+ brcm,serial-leds;
+ brcm,serial-dat-low;
+ brcm,serial-shift-inv;
+
+ led@0 {
+ reg = <0>;
+ brcm,hardware-controlled;
+ brcm,link-signal-sources = <0>;
+ /* GPHY0 Speed 0 */
+ };
+ led@1 {
+ reg = <1>;
+ brcm,hardware-controlled;
+ brcm,link-signal-sources = <1>;
+ /* GPHY0 Speed 1 */
+ };
+ led@2 {
+ reg = <2>;
+ active-low;
+ label = "vr-3032u:red:inet";
+ };
+ led@3 {
+ reg = <3>;
+ active-low;
+ label = "vr-3032u:green:dsl";
+ };
+ led@4 {
+ reg = <4>;
+ active-low;
+ label = "vr-3032u:green:usb";
+ };
+ led@7 {
+ reg = <7>;
+ active-low;
+ label = "vr-3032u:green:wps";
+ };
+ led@8 {
+ reg = <8>;
+ active-low;
+ label = "vr-3032u:green:inet";
+ };
+ led@9 {
+ reg = <9>;
+ brcm,hardware-controlled;
+ /* EPHY0 Activity */
+ };
+ led@10 {
+ reg = <10>;
+ brcm,hardware-controlled;
+ /* EPHY1 Activity */
+ };
+ led@11 {
+ reg = <11>;
+ brcm,hardware-controlled;
+ /* EPHY2 Activity */
+ };
+ led@12 {
+ reg = <12>;
+ brcm,hardware-controlled;
+ /* GPHY0 Activity */
+ };
+ led@13 {
+ reg = <13>;
+ brcm,hardware-controlled;
+ /* EPHY0 Speed */
+ };
+ led@14 {
+ reg = <14>;
+ brcm,hardware-controlled;
+ /* EPHY1 Speed */
+ };
+ led@15 {
+ reg = <15>;
+ brcm,hardware-controlled;
+ /* EPHY2 Speed */
+ };
+ led@20 {
+ reg = <20>;
+ active-low;
+ label = "vr-3032u:green:power";
+ default-state = "on";
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
--
2.1.4
Powered by blists - more mailing lists