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Message-Id: <1464948011-377-10-git-send-email-geert+renesas@glider.be>
Date: Fri, 3 Jun 2016 12:00:09 +0200
From: Geert Uytterhoeven <geert+renesas@...der.be>
To: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Jiri Slaby <jslaby@...e.com>,
Peter Hurley <peter@...leysoftware.com>
Cc: Magnus Damm <magnus.damm@...il.com>,
Laurent Pinchart <laurent.pinchart+renesas@...asonboard.com>,
Yoshinori Sato <ysato@...rs.sourceforge.jp>,
linux-serial@...r.kernel.org, linux-renesas-soc@...r.kernel.org,
linux-sh@...r.kernel.org, linux-kernel@...r.kernel.org,
Geert Uytterhoeven <geert+renesas@...der.be>
Subject: [PATCH v3 09/11] serial: sh-sci: Add pin initialization for SCIFA/SCIFB
Before, the driver relied on initialization by the boot loader, or by
implicit reset state.
Note that unlike on (H)SCIF, the RTS/CTS bits exist only if dedicated
RTS/CTS pins are available, which depends on the SoC and UART instance.
Signed-off-by: Geert Uytterhoeven <geert+renesas@...der.be>
---
v3:
- No changes,
v2:
- New.
---
drivers/tty/serial/sh-sci.c | 16 +++++++++++++++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index c46999f20917964e..b9d027af0f3e71f6 100644
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -712,7 +712,21 @@ static void sci_init_pins(struct uart_port *port, unsigned int cflag)
return;
}
- if (sci_getreg(port, SCSPTR)->size) {
+ if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
+ u16 ctrl = serial_port_in(port, SCPCR);
+
+ /* Enable RXD and TXD pin functions */
+ ctrl &= ~(SCPCR_RXDC | SCPCR_TXDC);
+ if (to_sci_port(port)->cfg->capabilities & SCIx_HAVE_RTSCTS) {
+ /* RTS# is output, driven 1 */
+ ctrl |= SCPCR_RTSC;
+ serial_port_out(port, SCPDR,
+ serial_port_in(port, SCPDR) | SCPDR_RTSD);
+ /* Enable CTS# pin function */
+ ctrl &= ~SCPCR_CTSC;
+ }
+ serial_port_out(port, SCPCR, ctrl);
+ } else if (sci_getreg(port, SCSPTR)->size) {
u16 status = serial_port_in(port, SCSPTR);
/* RTS# is output, driven 1 */
--
1.9.1
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