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Message-Id: <1464986273-12039-3-git-send-email-pantelis.antoniou@konsulko.com>
Date: Fri, 3 Jun 2016 23:37:52 +0300
From: Pantelis Antoniou <pantelis.antoniou@...sulko.com>
To: Rob Herring <robherring2@...il.com>
Cc: Frank Rowand <frowand.list@...il.com>,
Matt Porter <mporter@...sulko.com>,
Koen Kooi <koen@...inion.thruhere.net>,
Guenter Roeck <linux@...ck-us.net>,
Marek Vasut <marex@...x.de>, Wolfram Sang <wsa@...-dreams.de>,
Stephen Boyd <stephen.boyd@...aro.org>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-i2c@...r.kernel.org,
Pantelis Antoniou <pantelis.antoniou@...sulko.com>,
Pantelis Antoniou <panto@...oniou-consulting.com>
Subject: [RFC 2/3] dts: Beaglebone portable connector definitions
Update the DTS with the information required for defining the
P8/P9 connector of the beaglebone.
Signed-off-by: Pantelis Antoniou <pantelis.antoniou@...sulko.com>
---
arch/arm/boot/dts/am335x-bone-common.dtsi | 1630 +++++++++++++++++++++++++++++
1 file changed, 1630 insertions(+)
diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
index ce66713..0e73ab6 100644
--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
+++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
@@ -417,4 +417,1634 @@
};
};
};
+
+};
+
+
+/* the muxes for the dtcon */
+&am33xx_pinmux {
+ /* P8.3 GPIO1_6 */
+ gpio1_6_in: gpio1_6_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio1_6_out: gpio1_6_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x818, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.4 */
+ gpio1_7_in: gpio1_7_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio1_7_out: gpio1_7_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x81c, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.5 */
+ gpio1_2_in: gpio1_2_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+
+ gpio1_2_out: gpio1_2_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x808, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.6 */
+ gpio1_3_in: gpio1_3_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio1_3_out: gpio1_3_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x80c, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.7 */
+ gpio2_2_in: gpio2_2_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x890, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio2_2_out: gpio2_2_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x890, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.8 */
+ gpio2_3_in: gpio2_3_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x894, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio2_3_out: gpio2_3_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x894, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.9 */
+ gpio2_5_in: gpio2_5_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x89c, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio2_5_out: gpio2_5_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x89c, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.10 */
+ gpio2_4_in: gpio2_4_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x898, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio2_4_out: gpio2_4_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x898, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.11 */
+ gpio1_13_in: gpio1_13_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio1_13_out: gpio1_13_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x834, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.12 */
+ gpio1_12_in: gpio1_12_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x830, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio1_12_out: gpio1_12_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x830, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.13 */
+ gpio0_23_in: gpio0_23_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x824, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio0_23_out: gpio0_23_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x824, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.14 */
+ gpio0_26_in: gpio0_26_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x828, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio0_26_out: gpio0_26_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x828, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.15 */
+ gpio1_15_in: gpio1_15_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x83c, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio1_15_out: gpio1_15_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x83c, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.16 */
+ gpio1_14_in: gpio1_14_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio1_14_out: gpio1_14_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x838, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.17 */
+ gpio0_27_in: gpio0_27_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x82c, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio0_27_out: gpio0_27_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x82c, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.18 */
+ gpio2_1_in: gpio2_1_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x88c, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio2_1_out: gpio2_1_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x88c, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.19 */
+ gpio0_22_in: gpio0_22_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x820, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio0_22_out: gpio0_22_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x820, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.20 */
+ gpio1_31_in: gpio1_31_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio1_31_out: gpio1_31_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x884, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.21 */
+ gpio1_30_in: gpio1_30_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio1_30_out: gpio1_30_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x880, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.22 */
+ gpio1_5_in: gpio1_5_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio1_5_out: gpio1_5_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x814, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.23 */
+ gpio1_4_in: gpio1_4_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio1_4_out: gpio1_4_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x810, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.24 */
+ gpio1_1_in: gpio1_1_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio1_1_out: gpio1_1_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x804, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.25 */
+ gpio1_0_in: gpio1_0_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio1_0_out: gpio1_0_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x800, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.26 */
+ gpio1_29_in: gpio1_29_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x87c, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio1_29_out: gpio1_29_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x87c, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.27 */
+ gpio2_22_in: gpio2_22_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8e0, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio2_22_out: gpio2_22_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8e0, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.28 */
+ gpio2_24_in: gpio2_24_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio2_24_out: gpio2_24_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8e8, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.29 */
+ gpio2_23_in: gpio2_23_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio2_23_out: gpio2_23_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8e4, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.30 */
+ gpio2_25_in: gpio2_25_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio2_25_out: gpio2_25_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8ec, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.31 */
+ uart5_rxd_mux1: uart5_rxd_mux1 {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8d8, PIN_INPUT_PULLUP | MUX_MODE4)
+ >;
+ };
+ uart5_ctsn: uart5_ctsn {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8d8, PIN_INPUT_PULLUP | MUX_MODE6)
+ >;
+ };
+ gpio0_10_in: gpio0_10_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8d8, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio0_10_out: gpio0_10_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8d8, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.32 */
+ uart5_rtsn: uart5_rtsn {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8dc, PIN_INPUT_PULLUP | MUX_MODE6)
+ >;
+ };
+ gpio0_11_in: gpio0_11_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8dc, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio0_11_out: gpio0_11_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8dc, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.33 */
+ gpio0_9_in: gpio0_9_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8d4, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio0_9_out: gpio0_9_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8d4, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.34 */
+ gpio2_17_in: gpio2_17_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8cc, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio2_17_out: gpio2_17_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8cc, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.35 */
+ gpio0_8_in: gpio0_8_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8d0, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio0_8_out: gpio0_8_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8d0, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.36 */
+ gpio2_16_in: gpio2_16_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8c8, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio2_16_out: gpio2_16_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8c8, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.37 */
+ uart5_txd: uart5_txd {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8c0, PIN_OUTPUT_PULLDOWN | MUX_MODE4)
+ >;
+ };
+ uart2_ctsn: uart2_ctsn {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8c0, PIN_INPUT_PULLUP | MUX_MODE6)
+ >;
+ };
+ gpio2_14_in: gpio2_14_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8c0, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio2_14_out: gpio2_14_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8c0, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.38 */
+ uart5_rxd: uart5_rxd {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8c4, PIN_OUTPUT_PULLDOWN | MUX_MODE4)
+ >;
+ };
+ uart2_rtsn: uart2_rtsn {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8c4, PIN_OUTPUT_PULLDOWN | MUX_MODE6)
+ >;
+ };
+ gpio2_15_in: gpio2_15_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8c4, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio2_15_out: gpio2_15_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8c4, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.39 */
+ gpio2_12_in: gpio2_12_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8b8, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio2_12_out: gpio2_12_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8b8, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.40 */
+ gpio2_13_in: gpio2_13_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8bc, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+
+ gpio2_13_out: gpio2_13_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8bc, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.41 */
+ gpio2_10_in: gpio2_10_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8b0, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+
+ gpio2_10_out: gpio2_10_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8b0, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.42 */
+ gpio2_11_in: gpio2_11_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8b4, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio2_11_out: gpio2_11_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8b4, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.43 */
+ gpio2_8_in: gpio2_8_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8a8, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio2_8_out: gpio2_8_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8a8, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.44 */
+ gpio2_9_in: gpio2_9_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8ac, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio2_9_out: gpio2_9_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8ac, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.45 */
+ gpio2_6_in: gpio2_6_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8a0, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+
+ gpio2_6_out: gpio2_6_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8a0, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P8.46 */
+ gpio2_7_in: gpio2_7_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8a4, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio2_7_out: gpio2_7_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8a4, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P9.11 */
+ gpio0_30_in: gpio0_30_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio0_30_out: gpio0_30_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x870, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P9.12 */
+ gpio1_28_in: gpio1_28_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x878, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio1_28_out: gpio1_28_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x878, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P9.13 */
+ gpio0_31_in: gpio0_31_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x874, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio0_31_out: gpio0_31_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x874, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P9.14 */
+ gpio1_18_in: gpio1_18_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x848, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio1_18_out: gpio1_18_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P9.15 */
+ gpio1_16_in: gpio1_16_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x840, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio1_16_out: gpio1_16_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P9.16 */
+ gpio0_19_in: gpio0_19_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x84c, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio0_19_out: gpio0_19_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x84c, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P9.17 */
+ i2c1_scl: i2c1_scl {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE2)
+ >;
+ };
+ gpio0_5_in: gpio0_5_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio0_5_out: gpio0_5_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x95c, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P9.18 */
+ i2c1_sda: i2c1_sda {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE2)
+ >;
+ };
+ gpio0_4_in: gpio0_4_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio0_4_out: gpio0_4_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x958, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P9.19 */
+ uart1_rtsn: uart1_rtsn {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x87c, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
+ >;
+ };
+ gpio0_13_in: gpio0_13_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio0_13_out: gpio0_13_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P9.20 */
+ uart1_ctsn: uart1_ctsn {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x878, PIN_INPUT_PULLUP | MUX_MODE0)
+ >;
+ };
+ gpio0_12_in: gpio0_12_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio0_12_out: gpio0_12_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x978, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P9.21 */
+ uart2_txd: uart2_txd {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x954, PIN_OUTPUT_PULLDOWN | MUX_MODE1)
+ >;
+ };
+ gpio0_3_in: gpio0_3_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio0_3_out: gpio0_3_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x954, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P9.22 */
+ uart2_rxd: uart2_rxd {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE1)
+ >;
+ };
+ gpio0_2_in: gpio0_2_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio0_2_out: gpio0_2_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x950, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P9.23 */
+ gpio1_17_in: gpio1_17_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio1_17_out: gpio1_17_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x844, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P9.24 */
+ uart1_txd: uart1_txd {
+ pinctrl-single = <
+ AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
+ >;
+ };
+ i2c1_scl_mux1: i2c1_scl_mux1 {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE3)
+ >;
+ };
+ gpio0_15_in: gpio0_15_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio0_15_out: gpio0_15_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+ /* P9.25 */
+ gpio3_21_in: gpio3_21_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio3_21_out: gpio3_21_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x9ac, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P9.26 */
+ uart1_rxd: uart1_rxd {
+ pinctrl-single = <
+ AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0)
+ >;
+ };
+ i2c1_sda_mux1: i2c1_sda_mux1 {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE3)
+ >;
+ };
+ gpio0_14_in: gpio0_14_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio0_14_out: gpio0_14_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x980, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P9.27 */
+ gpio3_19_in: gpio3_19_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x9a4, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio3_19_out: gpio3_19_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x9a4, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P9.28 */
+ gpio3_17_in: gpio3_17_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x99c, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio3_17_out: gpio3_17_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x99c, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P9.29 */
+ gpio3_15_in: gpio3_15_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x994, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio3_15_out: gpio3_15_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x994, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P9.30 */
+ gpio3_16_in: gpio3_16_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x998, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio3_16_out: gpio3_16_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x998, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P9.31 */
+ gpio3_14_in: gpio3_14_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x990, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio3_14_out: gpio3_14_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x990, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P9.40 */
+ gpio0_20_in: gpio0_20_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio0_20_out: gpio0_20_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P9.41 */
+ gpio3_20_in: gpio3_20_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x9a8, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio3_20_out: gpio3_20_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x9a8, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ /* P9.42 GPIO0_7 wired to GPIO3_18 */
+ gpio0_7_in: gpio0_7_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x964, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio0_7_out: gpio0_7_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x964, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+ gpio3_18_in: gpio3_18_in {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x9a0, PIN_INPUT_PULLUP | MUX_MODE7)
+ >;
+ };
+ gpio3_18_out: gpio3_18_out {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x9a0, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+};
+
+/* the device tree based connector */
+/ {
+ P8_P9 {
+ compatible = "extcon,dt-con";
+ status = "okay";
+
+ connector {
+
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ GPIO1_6: GPIO1_6 {
+ reg = <8 3>;
+ pad = "R9";
+ modes = "gpmc_ad6", "mmc1_dat6", "", "", "", "", "", "gpio1_6";
+
+ pinmuxes = <&gpio1_6_in &gpio1_6_out>;
+ gpio = <&gpio1 6>;
+ };
+ GPIO1_7: GPIO1_7 {
+ reg = <8 4>;
+ pad = "T9";
+ modes = "gpmc_ad7", "mmc1_dat7", "", "", "", "", "", "gpio1_7";
+ pinmuxes = <&gpio1_7_in &gpio1_7_out>;
+ gpio = <&gpio1 7>;
+ };
+ GPIO1_2: GPIO1_2 {
+ reg = <8 5>;
+ pad = "R8";
+ modes = "gpmc_ad2", "mmc1_dat2", "", "", "", "", "", "gpio1_2";
+ pinmuxes = <&gpio1_2_in &gpio1_2_out>;
+ gpio = <&gpio1 2>;
+ };
+ GPIO1_3: GPIO1_3 {
+ reg = <8 6>;
+ pad = "T8";
+ modes = "gpmc_ad3", "mmc1_dat3", "", "", "", "", "", "gpio1_3";
+ pinmuxes = <&gpio1_3_in &gpio1_3_out>;
+ gpio = <&gpio1 3>;
+ };
+ TIMER4: TIMER4 {
+ reg = <8 7>;
+ pad = "R7";
+ modes = "gpmc_advn_ale", "", "timer4", "", "", "", "", "gpio2_2";
+ pinmuxes = <&gpio2_2_in &gpio2_2_out>;
+ gpio = <&gpio2 2>;
+ };
+ TIMER7: TIMER7 {
+ reg = <8 8>;
+ pad = "T7";
+ modes = "gpmc_oen_ren", "", "timer7", "", "", "", "", "gpio2_3";
+ pinmuxes = <&gpio2_3_in &gpio2_3_out>;
+ gpio = <&gpio2 3>;
+ };
+ TIMER5: TIMER5 {
+ reg = <8 9>;
+ pad = "T6";
+ modes = "gpmc_be0n_cle", "", "timer5", "", "", "", "", "gpio2_5";
+ pinmuxes = <&gpio2_5_in &gpio2_5_out>;
+ gpio = <&gpio2 5>;
+ };
+ TIMER6: TIMER6 {
+ reg = <8 10>;
+ pad = "U6";
+ modes = "gpmc_wen", "", "timer6", "", "", "", "", "gpio2_4";
+ pinmuxes = <&gpio2_4_in &gpio2_4_out>;
+ gpio = <&gpio2 4>;
+ };
+ GPIO1_13: GPIO1_13 {
+ reg = <8 11>;
+ pad = "R12";
+ modes = "gpmc_ad13", "lcd_data18", "mmc1_dat5", "mmc2_dat1", "eqep2b_in", "", "", "gpio1_13";
+ pinmuxes = <&gpio1_13_in &gpio1_13_out>;
+ gpio = <&gpio1 13>;
+ };
+ GPIO1_12: GPIO1_12 {
+ reg = <8 12>;
+ pad = "T12";
+ modes = "gpmc_ad12", "lcd_data19", "mmc1_dat4", "mmc2_dat0", "eqep2a_in", "", "", "gpio1_12";
+ pinmuxes = <&gpio1_12_in &gpio1_12_out>;
+ gpio = <&gpio1 12>;
+ };
+ EHRPWM2B: EHRPWM2B {
+ reg = <8 13>;
+ pad = "T10";
+ modes = "gpmc_ad9", "lcd_data22", "mmc1_dat1", "mmc2_dat5", "ehrpwm2B", "", "", "gpio0_23";
+ pinmuxes = <&gpio0_23_in &gpio0_23_out>;
+ gpio = <&gpio0 23>;
+ };
+ GPIO0_26: GPIO0_26 {
+ reg = <8 14>;
+ pad = "T11";
+ modes = "gpmc_ad10", "lcd_data21", "mmc1_dat2", "mmc2_dat6", "ehrpwm2_tripzone_in", "", "", "gpio0_26";
+ pinmuxes = <&gpio0_26_in &gpio0_26_out>;
+ gpio = <&gpio0 26>;
+ };
+ GPIO1_15: GPIO1_15 {
+ reg = <8 15>;
+ pad = "U13";
+ modes = "gpmc_ad15", "lcd_data16", "mmc1_dat7", "mmc2_dat3", "eqep2_strobe", "", "", "gpio1_15";
+ pinmuxes = <&gpio1_15_in &gpio1_15_out>;
+ gpio = <&gpio1 15>;
+ };
+ GPIO1_14: GPIO1_14 {
+ reg = <8 16>;
+ pad = "V13";
+ modes = "gpmc_ad14", "lcd_data17", "mmc1_dat6", "mmc2_dat2", "eqep2_index", "", "", "gpio1_14";
+ pinmuxes = <&gpio1_14_in &gpio1_14_out>;
+ gpio = <&gpio1 14>;
+ };
+ GPIO0_27: GPIO0_27 {
+ reg = <8 17>;
+ pad = "U12";
+ modes = "gpmc_ad11", "lcd_data20", "mmc1_dat3", "mmc2_dat7", "ehrpwm0_synco", "", "", "gpio0_27";
+ pinmuxes = <&gpio0_27_in &gpio0_27_out>;
+ gpio = <&gpio0 27>;
+ };
+ GPIO2_1: GPIO2_1 {
+ reg = <8 18>;
+ pad = "V12";
+ modes = "gpmc_clk_mux0", "lcd_memory_clk", "gpmc_wait1", "mmc2_clk", "", "", "mcasp0_fsr", "gpio2_1";
+ pinmuxes = <&gpio2_1_in &gpio2_1_out>;
+ gpio = <&gpio2 1>;
+ };
+ EHRPWM2A: EHRPWM2A {
+ reg = <8 19>;
+ pad = "U10";
+ modes = "gpmc_ad8", "lcd_data23", "mmc1_dat0", "mmc2_dat4", "ehrpwm2A", "", "", "gpio0_22";
+ pinmuxes = <&gpio0_22_in &gpio0_22_out>;
+ gpio = <&gpio0 22>;
+ };
+ GPIO1_31: GPIO1_31 {
+ reg = <8 20>;
+ pad = "V9";
+ modes = "gpmc_csn2", "gpmc_be1n", "mmc1_cmd", "", "", "", "", "gpio1_31";
+ pinmuxes = <&gpio1_31_in &gpio1_31_out>;
+ gpio = <&gpio1 31>;
+ };
+ GPIO1_30: GPIO1_30 {
+ reg = <8 21>;
+ pad = "U9";
+ modes = "gpmc_csn1", "gpmc_clk", "mmc1_clk", "", "", "", "", "gpio1_30";
+ pinmuxes = <&gpio1_30_in &gpio1_30_out>;
+ gpio = <&gpio1 30>;
+ };
+ GPIO1_5: GPIO1_5 {
+ reg = <8 22>;
+ pad = "V8";
+ modes = "gpmc_ad5", "mmc1_dat5", "", "", "", "", "", "gpio1_5";
+ pinmuxes = <&gpio1_5_in &gpio1_5_out>;
+ gpio = <&gpio1 5>;
+ };
+ GPIO1_4: GPIO1_4 {
+ reg = <8 23>;
+ pad = "U8";
+ modes = "gpmc_ad4", "mmc1_dat4", "", "", "", "", "", "gpio1_4";
+ pinmuxes = <&gpio1_4_in &gpio1_4_out>;
+ gpio = <&gpio1 4>;
+ };
+ GPIO1_1: GPIO1_1 {
+ reg = <8 24>;
+ pad = "V7";
+ modes = "gpmc_ad1", "mmc1_dat1", "", "", "", "", "", "gpio1_1";
+ pinmuxes = <&gpio1_1_in &gpio1_1_out>;
+ gpio = <&gpio1 1>;
+ };
+ GPIO1_0: GPIO1_0 {
+ reg = <8 25>;
+ pad = "U7";
+ modes = "gpmc_ad0", "mmc1_dat0", "", "", "", "", "", "gpio1_0";
+ pinmuxes = <&gpio1_0_in &gpio1_0_out>;
+ gpio = <&gpio1 0>;
+ };
+ GPIO1_29: GPIO1_29 {
+ reg = <8 26>;
+ pad = "V6";
+ modes = "gpmc_csn0", "", "", "", "", "", "", "gpio1_29";
+ pinmuxes = <&gpio1_29_in &gpio1_29_out>;
+ gpio = <&gpio1 29>;
+ };
+ GPIO2_22: GPIO2_22 {
+ reg = <8 27>;
+ pad = "U5";
+ modes = "lcd_vsync", "gpmc_a8", "", "", "", "", "", "gpio2_22";
+ pinmuxes = <&gpio2_22_in &gpio2_22_out>;
+ gpio = <&gpio2 22>;
+ };
+ GPIO2_24: GPIO2_24 {
+ reg = <8 28>;
+ pad = "V5";
+ modes = "lcd_pclk", "gpmc_a10", "", "", "", "", "", "gpio2_24";
+ pinmuxes = <&gpio2_24_in &gpio2_24_out>;
+ gpio = <&gpio2 24>;
+ };
+ GPIO2_23: GPIO2_23 {
+ reg = <8 29>;
+ pad = "R5";
+ modes = "lcd_hsync", "gpmc_a9", "", "", "", "", "", "gpio2_23";
+ pinmuxes = <&gpio2_23_in &gpio2_23_out>;
+ gpio = <&gpio2 23>;
+ };
+ GPIO2_25: GPIO2_25 {
+ reg = <8 30>;
+ pad = "R6";
+ modes = "lcd_ac_bias_en", "gpmc_a11", "", "", "", "", "", "gpio2_25";
+ pinmuxes = <&gpio2_25_in &gpio2_25_out>;
+ gpio = <&gpio2 25>;
+ };
+ UART5_CTSN: UART5_CTSN {
+ reg = <8 31>;
+ pad = "V4";
+ modes = "lcd_data14", "gpmc_a18", "eqep1_index", "mcasp0_axr1", "uart5_rxd_mux1", "", "uart5_ctsn", "gpio0_10";
+ pinmuxes = <&uart5_rxd_mux1 &uart5_ctsn &gpio0_10_in &gpio0_10_out>;
+ gpio = <&gpio0 10>;
+ };
+ UART5_RTSN: UART5_RTSN {
+ reg = <8 32>;
+ pad = "T5";
+ modes = "lcd_data15", "gpmc_a19", "eqep1_strobe", "mcasp0_ahclkx", "mcasp0_axr3", "", "uart5_rtsn", "gpio0_11";
+ pinmuxes = <&uart5_rtsn &gpio0_11_in &gpio0_11_out>;
+ gpio = <&gpio0 11>;
+ };
+ UART4_RTSN: UART4_RTSN {
+ reg = <8 33>;
+ pad = "V3";
+ modes = "lcd_data13", "gpmc_a17", "eqep1b_in", "mcasp0_fsr", "mcasp0_axr3", "", "uart4_rtsn", "gpio0_9";
+ pinmuxes = <&gpio0_9_in &gpio0_9_out>;
+ gpio = <&gpio0 9>;
+ };
+ UART3_RTSN: UART3_RTSN {
+ reg = <8 34>;
+ pad = "U4";
+ modes = "lcd_data11", "gpmc_a15", "ehrpwm1B", "mcasp0_ahclkr", "mcasp0_axr2", "", "uart3_rtsn", "gpio2_17";
+ pinmuxes = <&gpio2_17_in &gpio2_17_out>;
+ gpio = <&gpio2 17>;
+ };
+ UART4_CTSN: UART4_CTSN {
+ reg = <8 35>;
+ pad = "V2";
+ modes = "lcd_data12", "gpmc_a16", "eqep1a_in", "mcasp0_aclkr", "mcasp0_axr2", "", "uart4_ctsn", "gpio0_8";
+ pinmuxes = <&gpio0_8_in &gpio0_8_out>;
+ gpio = <&gpio0 8>;
+ };
+ UART3_CTSN: UART3_CTSN {
+ reg = <8 36>;
+ pad = "U3";
+ modes = "lcd_data10", "gpmc_a14", "ehrpwm1A", "mcasp0_axr0", "", "", "uart3_ctsn", "gpio2_16";
+ pinmuxes = <&gpio2_16_in &gpio2_16_out>;
+ gpio = <&gpio2 16>;
+ };
+ UART5_TXD: UART5_TXD {
+ reg = <8 37>;
+ pad = "U1";
+ modes = "lcd_data8", "gpmc_a12", "ehrpwm1_tripzone_in", "mcasp0_aclkx", "uart5_txd", "", "uart2_ctsn", "gpio2_14";
+ pinmuxes = <&uart5_txd &uart2_ctsn &gpio2_14_in &gpio2_14_out>;
+ gpio = <&gpio2 14>;
+ };
+ UART5_RXD: UART5_RXD {
+ reg = <8 38>;
+ pad = "U2";
+ modes = "lcd_data9", "gpmc_a13", "ehrpwm0_synco", "mcasp0_fsx", "uart5_rxd", "", "uart2_rtsn", "gpio2_15";
+ pinmuxes = <&uart5_rxd &uart2_rtsn &gpio2_15_in &gpio2_15_out>;
+ gpio = <&gpio2 15>;
+ };
+ GPIO2_12: GPIO2_12 {
+ reg = <8 39>;
+ pad = "T3";
+ modes = "lcd_data6", "gpmc_a6", "", "eqep2_index", "", "", "", "gpio2_12";
+ pinmuxes = <&gpio2_12_in &gpio2_12_out>;
+ gpio = <&gpio2 12>;
+ };
+ GPIO2_13: GPIO2_13 {
+ reg = <8 40>;
+ pad = "T4";
+ modes = "lcd_data7", "gpmc_a7", "", "eqep2_strobe", "pr1_edio_data_out7", "", "", "gpio2_13";
+ pinmuxes = <&gpio2_13_in &gpio2_13_out>;
+ gpio = <&gpio2 13>;
+ };
+ GPIO2_10: GPIO2_10 {
+ reg = <8 41>;
+ pad = "T1";
+ modes = "lcd_data4", "gpmc_a4", "", "eqep2a_in", "", "", "", "gpio2_10";
+ pinmuxes = <&gpio2_10_in &gpio2_10_out>;
+ gpio = <&gpio2 10>;
+ };
+ GPIO2_11: GPIO2_11 {
+ reg = <8 42>;
+ pad = "T2";
+ modes = "lcd_data5", "gpmc_a5", "", "eqep2b_in", "", "", "", "gpio2_11";
+ pinmuxes = <&gpio2_11_in &gpio2_11_out>;
+ gpio = <&gpio2 11>;
+ };
+ GPIO2_8: GPIO2_8 {
+ reg = <8 43>;
+ pad = "R3";
+ modes = "lcd_data2", "gpmc_a2", "", "ehrpwm2_tripzone_in", "", "", "", "gpio2_8";
+ pinmuxes = <&gpio2_8_in &gpio2_8_out>;
+ gpio = <&gpio2 8>;
+ };
+ GPIO2_9: GPIO2_9 {
+ reg = <8 44>;
+ pad = "R4";
+ modes = "lcd_data3", "gpmc_a3", "", "ehrpwm0_synco", "", "", "", "gpio2_9";
+ pinmuxes = <&gpio2_9_in &gpio2_9_out>;
+ gpio = <&gpio2 9>;
+ };
+ GPIO2_6: GPIO2_6 {
+ reg = <8 45>;
+ pad = "R1";
+ modes = "lcd_data0", "gpmc_a0", "", "ehrpwm2A", "", "", "", "gpio2_6";
+ pinmuxes = <&gpio2_6_in &gpio2_6_out>;
+ gpio = <&gpio2 6>;
+ };
+ GPIO2_7: GPIO2_7 {
+ reg = <8 46>;
+ pad = "R2";
+ modes = "lcd_data1", "gpmc_a1", "", "ehrpwm2B", "", "", "", "gpio2_7";
+ pinmuxes = <&gpio2_7_in &gpio2_7_out>;
+ gpio = <&gpio2 7>;
+ };
+
+
+ /* P9 */
+
+ GND {
+ reg = <9 1>, <9 2>, <9 43>, <9 44>, <9 45>, <9 46>;
+ };
+ DC_3_3V {
+ reg = <9 3>, <9 4>;
+ };
+ VDD_5V {
+ reg = <9 5>, <9 6>;
+ };
+ SYS_5V {
+ reg = <9 7>, <9 8>;
+ };
+ PWR_BUT {
+ reg = <9 9>;
+ };
+ SYS_RESETn: SYS_RESETn {
+ reg = <9 10>;
+ pad = "A10";
+ modes = "RESET_OUT", "", "", "", "", "", "", "";
+ };
+ UART4_RXD: UART4_RXD {
+ reg = <9 11>;
+ pad = "T17";
+ modes = "gpmc_wait0", "mii2_crs", "gpmc_csn4", "rmii2_crs_dv", "mmc1_sdcd", "", "uart4_rxd_mux2", "gpio0_30";
+ pinmuxes = <&gpio0_30_in &gpio0_30_out>;
+ gpio = <&gpio0 30>;
+ };
+ GPIO1_28: GPIO1_28 {
+ reg = <9 12>;
+ pad = "U18";
+ modes = "gpmc_be1n", "mii2_col", "gpmc_csn6", "mmc2_dat3", "gpmc_dir", "", "mcasp0_aclkr_mux3", "gpio1_28";
+ pinmuxes = <&gpio1_28_in &gpio1_28_out>;
+ gpio = <&gpio1 28>;
+ };
+ UART4_TXD: UART4_TXD {
+ reg = <9 13>;
+ pad = "U17";
+ modes = "gpmc_wpn", "mii2_rxerr", "gpmc_csn5", "rmii2_rxerr", "mmc2_sdcd", "", "uart4_txd_mux2", "gpio0_31";
+ pinmuxes = <&gpio0_31_in &gpio0_31_out>;
+ gpio = <&gpio0 31>;
+ };
+ EHRPWM1A: EHRPWM1A {
+ reg = <9 14>;
+ pad = "U14";
+ modes = "gpmc_a2", "mii2_txd3", "rgmii2_td3", "mmc2_dat1", "gpmc_a18", "", "ehrpwm1A_mux1", "gpio1_18";
+ pinmuxes = <&gpio1_18_in &gpio1_18_out>;
+ gpio = <&gpio1 18>;
+ };
+ GPIO1_16: GPIO1_16 {
+ reg = <9 15>;
+ pad = "R13";
+ modes = "gpmc_a0", "gmii2_txen", "rmii2_tctl", "mii2_txen", "gpmc_a16", "", "ehrpwm1_tripzone_input", "gpio1_16";
+ pinmuxes = <&gpio1_16_in &gpio1_16_out>;
+ gpio = <&gpio1 16>;
+ };
+ EHRPWM1B: EHRPWM1B {
+ reg = <9 16>;
+ pad = "T14";
+ modes = "gpmc_a3", "mii2_txd2", "rgmii2_td2", "mmc2_dat2", "gpmc_a19", "", "ehrpwm1B_mux1", "gpio1_19";
+ pinmuxes = <&gpio0_19_in &gpio0_19_out>;
+ gpio = <&gpio0 19>;
+ };
+ I2C1_SCL: I2C1_SCL {
+ reg = <9 17>;
+ pad = "A16";
+ modes = "spi0_cs0", "mmc2_sdwp", "i2c1_scl", "ehrpwm0_synci", "", "", "", "gpio0_5";
+ pinmuxes = <&i2c1_scl &gpio0_5_in &gpio0_5_out>;
+ gpio = <&gpio0 5>;
+ };
+ I2C1_SDA: I2C1_SDA {
+ reg = <9 18>;
+ pad = "B16";
+ modes = "spi0_d1", "mmc1_sdwp", "i2c1_sda", "ehrpwm0_tripzone", "", "", "", "gpio0_4";
+ pinmuxes = <&i2c1_sda &gpio0_4_in &gpio0_4_out>;
+ gpio = <&gpio0 4>;
+ };
+ I2C2_SCL: I2C2_SCL {
+ reg = <9 19>;
+ pad = "D17";
+ modes = "uart1_rtsn", "timer5", "dcan0_rx", "i2c2_scl", "spi1_cs1", "", "", "gpio0_13";
+ pinmuxes = <&uart1_rtsn &gpio0_13_in &gpio0_13_out>;
+ gpio = <&gpio0 13>;
+ };
+ I2C2_SDA: I2C2_SDA {
+ reg = <9 20>;
+ pad = "D18";
+ modes = "uart1_ctsn", "timer6", "dcan0_tx", "i2c2_sda", "spi1_cs0", "", "", "gpio0_12";
+ pinmuxes = <&uart1_ctsn &gpio0_12_in &gpio0_12_out>;
+ gpio = <&gpio0 12>;
+ };
+ UART2_TXD: UART2_TXD {
+ reg = <9 21>;
+ pad = "B17";
+ modes = "spi0_d0", "uart2_txd", "i2c2_scl", "ehrpwm0B", "", "", "emu3_mux1", "gpio0_3";
+ pinmuxes = <&uart2_txd &gpio0_3_in &gpio0_3_out>;
+ gpio = <&gpio0 3>;
+ };
+ UART2_RXD: UART2_RXD {
+ reg = <9 22>;
+ pad = "A17";
+ modes = "spi0_sclk", "uart2_rxd", "i2c2_sda", "ehrpwm0A", "", "", "emu2_mux1", "gpio0_2";
+ pinmuxes = <&uart2_rxd &gpio0_2_in &gpio0_2_out>;
+ gpio = <&gpio0 2>;
+ };
+ GPIO1_17: GPIO1_17 {
+ reg = <9 23>;
+ pad = "V14";
+ modes = "gpmc_a1", "gmii2_rxdv", "rgmii2_rxdv", "mmc2_dat0", "gpmc_a17", "", "ehrpwm0_synco", "gpio1_17";
+ pinmuxes = <&gpio1_17_in &gpio1_17_out>;
+ gpio = <&gpio1 17>;
+ };
+ UART1_TXD: UART1_TXD {
+ reg = <9 24>;
+ pad = "D15";
+ modes = "uart1_txd", "mmc2_sdwp", "dcan1_rx", "i2c1_scl_mux1", "", "", "", "gpio0_15";
+ pinmuxes = <&uart1_txd &i2c1_scl_mux1 &gpio0_15_in &gpio0_15_out>;
+ gpio = <&gpio0 15>;
+ };
+ GPIO3_21: GPIO3_21 {
+ reg = <9 25>;
+ pad = "A14";
+ modes = "mcasp0_ahclkx", "eqep0_strobe", "mcasp0_axr3", "mcasp1_axr1", "emu4_mux2", "", "", "gpio3_21";
+ pinmuxes = <&gpio3_21_in &gpio3_21_out>;
+ gpio = <&gpio3 21>;
+ };
+ UART1_RXD: UART1_RXD {
+ reg = <9 26>;
+ pad = "D16";
+ modes = "uart1_rxd", "mmc1_sdwp", "dcan1_tx", "i2c1_sda_mux1", "", "", "", "gpio0_14";
+ pinmuxes = <&uart1_rxd &i2c1_sda_mux1 &gpio0_14_in &gpio0_14_out>;
+ gpio = <&gpio0 14>;
+ };
+ GPIO3_19: GPIO3_19 {
+ reg = <9 27>;
+ pad = "C13";
+ modes = "mcasp0_fsr", "eqep0b_in", "mcasp0_axr3", "mcasp1_fsx", "emu2_mux2", "", "", "gpio3_19";
+ pinmuxes = <&gpio3_19_in &gpio3_19_out>;
+ gpio = <&gpio3 19>;
+ };
+ SPI1_CS0: SPI1_CS0 {
+ reg = <9 28>;
+ pad = "C12";
+ modes = "mcasp0_ahclkr", "ehrpwm0_synci", "mcasp0_axr2", "spi1_cs0", "ecap2_in_pwm2_out", "", "", "gpio3_17";
+ pinmuxes = <&gpio3_17_in &gpio3_17_out>;
+ gpio = <&gpio3 17>;
+ };
+ SPI1_D0: SPI1_D0 {
+ reg = <9 29>;
+ pad = "B13";
+ modes = "mcasp0_fsx", "ehrpwm0b", "", "spi1_d0", "mmc1_sdcd_mux1", "", "", "gpio3_15";
+ pinmuxes = <&gpio3_15_in &gpio3_15_out>;
+ gpio = <&gpio3 15>;
+ };
+ SPI1_D1: SPI1_D1 {
+ reg = <9 30>;
+ pad = "D12";
+ modes = "mcasp0_axr0", "ehrpwm0_tripzone", "", "spi1_d1", "mmc2_sdcd_mux1", "", "", "gpio3_16";
+ pinmuxes = <&gpio3_16_in &gpio3_16_out>;
+ gpio = <&gpio3 16>;
+ };
+ SPI1_SCLK: SPI1_SCLK {
+ reg = <9 31>;
+ pad = "A13";
+ modes = "mcasp0_aclkx", "ehrpwm0a", "", "spi1_sclk", "mmc0_sdcd_mux1", "", "", "gpio3_14";
+ pinmuxes = <&gpio3_14_in &gpio3_14_out>;
+ gpio = <&gpio3 14>;
+ };
+ VADC: VADC {
+ reg = <9 32>;
+ };
+ AIN4: AIN4 {
+ reg = <9 33>;
+ pad = "C8";
+ };
+ AGND: AGND {
+ reg = <9 34>;
+ };
+ AIN6: AIN6 {
+ reg = <9 35>;
+ pad = "A8";
+ };
+ AIN5: AIN5 {
+ reg = <9 36>;
+ pad = "B8";
+ };
+ AIN2: AIN2 {
+ reg = <9 37>;
+ pad = "B7";
+ };
+ AIN3: AIN3 {
+ reg = <9 38>;
+ pad = "A7";
+ };
+ AIN0: AIN0 {
+ reg = <9 39>;
+ pad = "B6";
+ };
+ AIN1: AIN1 {
+ reg = <9 40>;
+ pad = "C7";
+ };
+ CLKOUT2: CLKOUT2 {
+ /* wired with GPIO3_20 */
+ reg = <9 41>;
+ pad = "D14";
+ modes = "xdma_event_intr1", "", "tclkin", "clkout2", "timer7_mux1", "", "emu3_mux0", "gpio0_20";
+ pinmuxes = <&gpio0_20_in &gpio0_20_out>;
+ gpio = <&gpio0 20>;
+ };
+ GPIO3_20: GPIO3_20 {
+ /* wired with CLKOUT2 */
+ reg = <9 41>;
+ pad = "D13";
+ modes = "mcasp0_axr1", "eqep0_index", "", "mcasp1_axr0", "emu3", "", "", "gpio3_20";
+ pinmuxes = <&gpio3_20_in &gpio3_20_out>;
+ gpio = <&gpio3 20>;
+ };
+ GPIO0_7: GPIO0_7 {
+ /* wired with GPIO3_18 */
+ reg = <9 42>;
+ pad = "C18";
+ modes = "ecap0_in_pwm0_out", "uart3_txd", "spi1_cs1", "pr1_ecap0_ecap_capin_apwm_o", "spi1_sclk", "mmc0_sdwp", "xdma_event_intr2", "gpio0_7";
+ pinmuxes = <&gpio0_7_in &gpio0_7_out>;
+ gpio = <&gpio0 7>;
+ };
+ GPIO3_18: GPIO3_18 {
+ /* wired with GPIO0_7 */
+ reg = <9 42>;
+ pad = "B12";
+ modes = "mcasp0_aclkr", "eqep0a_in", "mcaspo_axr2", "mcasp1_aclkx", "", "", "", "gpio3_18";
+ pinmuxes = <&gpio3_18_in &gpio3_18_out>;
+ gpio = <&gpio3 18>;
+ };
+ };
+
+ functions {
+
+ gpio {
+ /* base of allocation - this is global for the connector */
+ gpio-base = <256>;
+ };
+
+ /* connector uart0 is uart2 of the bone */
+ uart {
+ params {
+
+ #param-cells = <2>;
+ generate-pinctrl;
+
+ txd {
+ required;
+ connector-pin;
+ };
+
+ rxd {
+ required;
+ connector-pin;
+ };
+
+ cts {
+ optional;
+ connector-pin;
+ gpio-property = "cts-gpios";
+ gpio-args = <GPIO_ACTIVE_LOW>;
+ };
+
+ rts {
+ optional;
+ connector-pin;
+ gpio-property = "rts-gpios";
+ gpio-args = <GPIO_ACTIVE_LOW>;
+ };
+
+ dtr {
+ optional;
+ connector-pin;
+ gpio-property = "dtr-gpios";
+ gpio-args = <GPIO_ACTIVE_LOW>;
+ };
+
+ dsr {
+ optional;
+ connector-pin;
+ gpio-property = "dsr-gpios";
+ gpio-args = <GPIO_ACTIVE_LOW>;
+ };
+
+ dcd {
+ optional;
+ connector-pin;
+ gpio-property = "dcd-gpios";
+ gpio-args = <GPIO_ACTIVE_LOW>;
+ };
+
+ rng {
+ optional;
+ connector-pin;
+ gpio-property = "rnd-gpios";
+ gpio-args = <GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ uart1 {
+ device = <&uart1>;
+ mux@0 {
+ txd = <&UART1_TXD &uart1_txd>;
+ rxd = <&UART1_RXD &uart1_rxd>;
+ cts = <&I2C2_SDA &uart1_ctsn>;
+ rts = <&I2C2_SCL &uart1_rtsn>;
+ };
+ };
+ uart2 {
+ device = <&uart2>;
+ mux@0 {
+ txd = <&UART2_TXD &uart2_txd>;
+ rxd = <&UART2_RXD &uart2_rxd>;
+ cts = <&UART5_TXD &uart2_ctsn>;
+ rts = <&UART5_RXD &uart2_rtsn>;
+ };
+ };
+ uart5 {
+ device = <&uart5>;
+ mux@0 {
+ txd = <&UART5_TXD &uart5_txd>;
+ rxd = <&UART5_RXD &uart5_rxd>,
+ <&UART5_CTSN &uart5_rxd_mux1>; /* muxed */
+ cts = <&UART5_CTSN &uart5_ctsn>;
+ rts = <&UART5_RTSN &uart5_rtsn>;
+ };
+ };
+ };
+
+ i2c {
+ params {
+
+ #param-cells = <2>;
+ copy-subdevices;
+ generate-pinctrl;
+
+ scl {
+ required;
+ connector-pin;
+ };
+
+ sda {
+ required;
+ connector-pin;
+ };
+
+ clock-frequency {
+ copy;
+ };
+
+ };
+
+ i2c1 {
+ device = <&i2c1>;
+
+ mux@0 {
+ scl = <&I2C1_SCL &i2c1_scl>,
+ <&UART1_TXD &i2c1_scl_mux1>;
+ sda = <&I2C1_SDA &i2c1_sda>,
+ <&UART1_RXD &i2c1_sda_mux1>;
+ };
+ };
+
+ i2c2 {
+ device = <&i2c2>;
+
+ mux@0 {
+ /* I2C2 is preconfigured and available */
+ scl = <&I2C2_SCL 0>;
+ sda = <&I2C2_SDA 0>;
+ pre-enabled;
+ };
+ };
+ };
+ };
+
+ plugged {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
};
--
1.7.12
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