linux-kernel - Re: [PATCH v4 4/7] dt: mdio-mux: Add mdio multiplexer driver node

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:	Mon, 6 Jun 2016 11:37:50 -0700
From:	Florian Fainelli <f.fainelli@...il.com>
To:	Pramod Kumar <pramod.kumar@...adcom.com>,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Catalin Marinas <catalin.marinas@....com>,
	Will Deacon <will.deacon@....com>,
	Kishon Vijay Abraham I <kishon@...com>,
	"David S. Miller" <davem@...emloft.net>
Cc:	devicetree@...r.kernel.org, netdev@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	bcm-kernel-feedback-list@...adcom.com,
	linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v4 4/7] dt: mdio-mux: Add mdio multiplexer driver node

On 06/06/2016 05:41 AM, Pramod Kumar wrote:
> Add integrated MDIO multiplexer driver node which contains
> two mux PCIe bus and one ethernet bus along with phys
> lying on these bus.
> 
> Signed-off-by: Pramod Kumar <pramod.kumar@...adcom.com>
> ---
> +		mdio_mux_iproc: mdio-mux@...2023c {
> +			compatible = "brcm,mdio-mux-iproc";
> +			reg = <0x6602023c 0x14>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +
> +			mdio@0 {
> +				reg = <0x0>;
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +
> +				pci_phy0: pci-phy@0 {
> +					compatible = "brcm,ns2-pcie-phy";
> +					reg = <0x0>;
> +					#phy-cells = <0>;
> +				};
> +			};
> +
> +			mdio@7 {
> +				reg = <0x7>;
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +
> +				pci_phy1: pci-phy@0 {
> +					compatible = "brcm,ns2-pcie-phy";
> +					reg = <0x0>;
> +					#phy-cells = <0>;
> +				};

Are these two PHYs always available in the NS2 SoC, or does that depend
on interfaces exposed at the board level? Should not they be flagged
with a disabled status property by default and enabled in their
respective board files?
-- 
Florian