linux-kernel - Re: [PATCH 0/5] Add suspend-to-idle validation for Intel SoCs

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20160607074632.GA13858@amd>
Date:	Tue, 7 Jun 2016 09:46:33 +0200
From:	Pavel Machek <pavel@....cz>
To:	dbasehore@...omium.org
Cc:	linux-kernel@...r.kernel.org, linux-pm@...r.kernel.org,
	rjw@...ysocki.net, len.brown@...el.com, tglx@...utronix.de
Subject: Re: [PATCH 0/5] Add suspend-to-idle validation for Intel SoCs

On Wed 2016-06-01 21:33:24, dbasehore@...omium.org wrote:
> From: Derek Basehore <dbasehore@...omium.org>
> 
> This patch set adds support for catching errors when entering freeze
> on Intel Skylake SoCs. Support for this can be added to newer SoCs in
> later patches.
> 
> Verification is done by waking up the CPU once every X (default 10)
> seconds to check the residency of S0ix. This can't be verified before
> attempting to enter S0ix through mwait, so we have to repeatedly
> verify entry into that state. Successfully entering S0ix is no
> guarantee that it will be entered on the next attempt, so we have to
> schedule another check. This has a minimal power impact of <1% of the
> total system power on our systems.

Dunno. Should this be protected with something like CONFIG_TEST_SLEEP?
People probably don't want this for production...

-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html