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Message-ID: <15428827.HfoQlKAJKr@diego>
Date:	Tue, 07 Jun 2016 09:59:46 +0200
From:	Heiko Stübner <heiko@...ech.de>
To:	Frank Wang <frank.wang@...k-chips.com>
Cc:	Mark Rutland <mark.rutland@....com>, dianders@...omium.org,
	linux@...ck-us.net, groeck@...omium.org, jwerner@...omium.org,
	kishon@...com, robh+dt@...nel.org, pawel.moll@....com,
	ijc+devicetree@...lion.org.uk, galak@...eaurora.org,
	linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
	linux-usb@...r.kernel.org, linux-rockchip@...ts.infradead.org,
	xzy.xu@...k-chips.com, kever.yang@...k-chips.com,
	huangtao@...k-chips.com, william.wu@...k-chips.com
Subject: Re: [PATCH v3 1/2] Documentation: bindings: add DT documentation for Rockchip USB2PHY

Hi Frank,

Am Dienstag, 7. Juni 2016, 11:31:59 schrieb Frank Wang:
> On 2016/6/7 10:59, Frank Wang wrote:
> > On 2016/6/6 20:33, Heiko Stübner wrote:
> >> Am Montag, 6. Juni 2016, 12:27:54 schrieb Mark Rutland:
> >>> On Mon, Jun 06, 2016 at 05:20:03PM +0800, Frank Wang wrote:
> >>>> Signed-off-by: Frank Wang <frank.wang@...k-chips.com>
> >>>> ---
> >>>> 
> >>>> Changes in v3:
> >>>>   - Added 'clocks' and 'clock-names' optional properties.
> >>>>   - Specified 'otg-port' and 'host-port' as the sub-node name.
> >>>> 
> >>>> Changes in v2:
> >>>>   - Changed vbus_host optional property from gpio to regulator.
> >>>>   - Specified vbus_otg-supply optional property.
> >>>>   - Specified otg_id and otg_bvalid property.
> >>>>   
> >>>>     .../bindings/phy/phy-rockchip-inno-usb2.txt        | 60
> >>>>   
> >>>>   ++++++++++++++++++++ 1 file changed, 60 insertions(+)
> >>>>   create mode 100644
> >>>> 
> >>>> Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt>
> >>>> diff --git
> >>>> a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt
> >>>> b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt new
> >>>> file mode 100644
> >>>> index 0000000..0b4bbbb
> >>>> --- /dev/null
> >>>> +++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt
> >>>> @@ -0,0 +1,60 @@
> >>>> +ROCKCHIP USB2.0 PHY WITH INNO IP BLOCK
> >>>> +
> >>>> +Required properties (phy (parent) node):
> >>>> + - compatible : should be one of the listed compatibles:
> >>>> +    * "rockchip,rk3366-usb2phy"
> >>>> +    * "rockchip,rk3399-usb2phy"
> >>>> + - #clock-cells : should be 0.
> >>>> + - clock-output-names : specify the 480m output clock name.
> >>>> +
> >>>> +Optional properties:
> >>>> + - clocks : phandle + phy specifier pair, for the input clock of phy.
> >>>> + - clock-names : input clock name of phy, must be "phyclk".
> >>>> + - vbus_host-supply : phandle to a regulator that supplies host vbus.
> >>>> + - vbus_otg-supply : phandle to a regulator that supplies otg vbus.
> >>> 
> >>> Nit: s/_/-/ here.
> >> 
> >> Something I only stumbled over yesterday for the first time on my
> >> rk3288-
> >> popmetal: The phy subnodes seem to be able to use a generic phy-supply
> >> property from inside the phy-core itself, see:
> >> 
> >> https://github.com/mmind/linux-rockchip/commit/93739f521fc65f44524b00c9aa
> >> f6db46bca94e02#diff-ddf3e45ebb753d6debf57022003a1a57R597
> >> 
> >> 
> >> for my WIP code for that other board.
> > 
> > Ah, good comments! I will try later, if it is practicable, I shall
> > correct it into the next patches (patch v4).
> 
> I am sorry to tell you that seems unworkable, because we have two
> sub-nodes (phy-ports) in one parent-node (phy),
> what is more, the 'phy-supply' property can only put into parent-node, I
> believe it can not be differentiated types of ports.
> I mean vbus for host and otg are separately.

I would disagree ;-)

If you look in phy-core.c phy_create(), you can see that the struct phy that
gets created, contains its own struct device instance, which then gets the
phys of_node (the host+otg subnodes in this context) attached to it.

The regulator_get_optional then runs on this struct device, thus making lookup
on the subnode. And that works just nicely on my rk3288-popmetal, with its 3
phy subnodes and debugfs/regulator/regulator_summary prints that nicely:

 vcc_sys                          0   12      0  5000mV     0mA  5000mV  5000mV 
    vcc_host_5v                   1    1      0  5000mV     0mA  5000mV  5000mV 
       phy-phy.2                                                    0mV     0mV
    vcc_otg_5v                    1    1      0  5000mV     0mA  5000mV  5000mV 
       phy-phy.0                                                    0mV     0mV
    vcc_sata_5v                   2    1      0  5000mV     0mA  5000mV  5000mV 
       phy-phy.1                                                    0mV     0mV


Heiko

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