linux-kernel - [PATCH 05/11] clk: imx: refine the powerup

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <1465396420-27064-5-git-send-email-aisheng.dong@nxp.com>
Date:	Wed, 8 Jun 2016 22:33:34 +0800
From:	Dong Aisheng <aisheng.dong@....com>
To:	<linux-clk@...r.kernel.org>
CC:	<linux-kernel@...r.kernel.org>, <sboyd@...eaurora.org>,
	<mturquette@...libre.com>, <shawnguo@...nel.org>,
	<linux-arm-kernel@...ts.infradead.org>, <aisheng.dong@....com>,
	<anson.huang@....com>
Subject: [PATCH 05/11] clk: imx: refine the powerup_set bit of clk-pllv3

There's a powerdown bit already, so let's change the name of
powerup_set bit to power_invert to reflects the power polarity
to make it less confusing.

Signed-off-by: Dong Aisheng <aisheng.dong@....com>
---
 drivers/clk/imx/clk-pllv3.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c
index eea2b1b3791e..3fdfb6d2cc71 100644
--- a/drivers/clk/imx/clk-pllv3.c
+++ b/drivers/clk/imx/clk-pllv3.c
@@ -29,8 +29,8 @@
  * struct clk_pllv3 - IMX PLL clock version 3
  * @clk_hw:	 clock source
  * @base:	 base address of PLL registers
- * @powerup_set: set POWER bit to power up the PLL
- * @powerdown:   pll powerdown offset bit
+ * @powerdown:	 pll powerdown bit offset
+ * @power_invert: set powerdown bit to power up the PLL
  * @div_mask:	 mask of divider bits
  * @div_shift:	 shift of divider bits
  *
@@ -40,7 +40,7 @@
 struct clk_pllv3 {
 	struct clk_hw	hw;
 	void __iomem	*base;
-	bool		powerup_set;
+	bool		power_invert;
 	u32		powerdown;
 	u32		div_mask;
 	u32		div_shift;
@@ -55,7 +55,7 @@ static int clk_pllv3_wait_lock(struct clk_pllv3 *pll)
 	u32 val = readl_relaxed(pll->base) & pll->powerdown;
 
 	/* No need to wait for lock when pll is not powered up */
-	if ((pll->powerup_set && !val) || (!pll->powerup_set && val))
+	if ((pll->power_invert && !val) || (!pll->power_invert && val))
 		return 0;
 
 	/* Wait for PLL to lock */
@@ -76,7 +76,7 @@ static int clk_pllv3_prepare(struct clk_hw *hw)
 	u32 val;
 
 	val = readl_relaxed(pll->base);
-	if (pll->powerup_set)
+	if (pll->power_invert)
 		val |= pll->powerdown;
 	else
 		val &= ~pll->powerdown;
@@ -91,7 +91,7 @@ static void clk_pllv3_unprepare(struct clk_hw *hw)
 	u32 val;
 
 	val = readl_relaxed(pll->base);
-	if (pll->powerup_set)
+	if (pll->power_invert)
 		val &= ~pll->powerdown;
 	else
 		val |= pll->powerdown;
@@ -326,7 +326,7 @@ struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
 		pll->div_shift = 1;
 	case IMX_PLLV3_USB:
 		ops = &clk_pllv3_ops;
-		pll->powerup_set = true;
+		pll->power_invert = true;
 		break;
 	case IMX_PLLV3_AV:
 		ops = &clk_pllv3_av_ops;
-- 
1.9.1