lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20160609094328.136b7bf8@ipc1.ka-ro>
Date:	Thu, 9 Jun 2016 09:43:28 +0200
From:	Lothar Waßmann <LW@...O-electronics.de>
To:	Dong Aisheng <aisheng.dong@....com>
Cc:	<linux-clk@...r.kernel.org>, anson.huang@....com,
	mturquette@...libre.com, sboyd@...eaurora.org,
	linux-kernel@...r.kernel.org, shawnguo@...nel.org,
	linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 05/11] clk: imx: refine the powerup_set bit of clk-pllv3

Hi,

On Wed, 8 Jun 2016 22:33:34 +0800 Dong Aisheng wrote:
> There's a powerdown bit already, so let's change the name of
> powerup_set bit to power_invert to reflects the power polarity
> to make it less confusing.
> 
> Signed-off-by: Dong Aisheng <aisheng.dong@....com>
> ---
>  drivers/clk/imx/clk-pllv3.c | 14 +++++++-------
>  1 file changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c
> index eea2b1b3791e..3fdfb6d2cc71 100644
> --- a/drivers/clk/imx/clk-pllv3.c
> +++ b/drivers/clk/imx/clk-pllv3.c
> @@ -29,8 +29,8 @@
>   * struct clk_pllv3 - IMX PLL clock version 3
>   * @clk_hw:	 clock source
>   * @base:	 base address of PLL registers
> - * @powerup_set: set POWER bit to power up the PLL
> - * @powerdown:   pll powerdown offset bit
> + * @powerdown:	 pll powerdown bit offset
> + * @power_invert: set powerdown bit to power up the PLL
s/set/clear/ ?



Lothar Waßmann

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ