linux-kernel - [tip:irq/urgent] irqchip/mips-gic: Fix IRQs in gic_dev

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <tip-4b2312bd0592708c85ed94368c874819e7013309@git.kernel.org>
Date:	Tue, 14 Jun 2016 02:46:08 -0700
From:	tip-bot for Harvey Hunt <tipbot@...or.com>
To:	linux-tip-commits@...r.kernel.org
Cc:	matt.redfearn@...tec.com, linux-kernel@...r.kernel.org,
	hpa@...or.com, tglx@...utronix.de, mingo@...nel.org,
	harvey.hunt@...tec.com, qsyousef@...il.com
Subject: [tip:irq/urgent] irqchip/mips-gic: Fix IRQs in gic_dev_domain

Commit-ID:  4b2312bd0592708c85ed94368c874819e7013309
Gitweb:     http://git.kernel.org/tip/4b2312bd0592708c85ed94368c874819e7013309
Author:     Harvey Hunt <harvey.hunt@...tec.com>
AuthorDate: Mon, 23 May 2016 12:05:52 +0100
Committer:  Thomas Gleixner <tglx@...utronix.de>
CommitDate: Tue, 14 Jun 2016 11:41:57 +0200

irqchip/mips-gic: Fix IRQs in gic_dev_domain

When allocating a new device IRQ, gic_dev_domain_alloc() correctly calls
irq_domain_set_hwirq_and_chip(), but gic_irq_domain_alloc() does not. This
means that gic_irq_domain believes all IRQs from the dev domain have an
hwirq of 0 and creates incorrect mappings in the linear_revmap. As
gic_irq_domain is a parent of the gic_dev_domain, this leads to an
inability to boot on devices with a GIC. Excerpt of the error:

[    2.297649] irq 0: nobody cared (try booting with the "irqpoll" option)
...
[    2.436963] handlers:
[    2.439492] Disabling IRQ #0

Fix this by calling irq_domain_set_hwirq_and_chip() for both the dev and
irq domain.

Now that we are modifying the parent domain, be sure to clear it up in
case of an allocation error.

Fixes: c98c1822ee13 ("irqchip/mips-gic: Add device hierarchy domain")
Fixes: 2af70a962070 ("irqchip/mips-gic: Add a IPI hierarchy domain")
Signed-off-by: Harvey Hunt <harvey.hunt@...tec.com>
Tested-by: Govindraj Raja <Govindraj.Raja@...tec.com> # On Pistachio SoC
Reviewed-by: Matt Redfearn <matt.redfearn@...tec.com>
Cc: linux-mips@...ux-mips.org
Cc: Qais Yousef <qsyousef@...il.com>
Cc: jason@...edaemon.net
Cc: marc.zyngier@....com
Cc: stable@...r.kernel.org
Link: http://lkml.kernel.org/r/1464001552-31174-1-git-send-email-harvey.hunt@imgtec.com
Signed-off-by: Thomas Gleixner <tglx@...utronix.de>

---
 drivers/irqchip/irq-mips-gic.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
index 3b5e10a..8a4adbeb 100644
--- a/drivers/irqchip/irq-mips-gic.c
+++ b/drivers/irqchip/irq-mips-gic.c
@@ -746,6 +746,12 @@ static int gic_irq_domain_alloc(struct irq_domain *d, unsigned int virq,
 		/* verify that it doesn't conflict with an IPI irq */
 		if (test_bit(spec->hwirq, ipi_resrv))
 			return -EBUSY;
+
+		hwirq = GIC_SHARED_TO_HWIRQ(spec->hwirq);
+
+		return irq_domain_set_hwirq_and_chip(d, virq, hwirq,
+						     &gic_level_irq_controller,
+						     NULL);
 	} else {
 		base_hwirq = find_first_bit(ipi_resrv, gic_shared_intrs);
 		if (base_hwirq == gic_shared_intrs) {
@@ -867,10 +873,14 @@ static int gic_dev_domain_alloc(struct irq_domain *d, unsigned int virq,
 						    &gic_level_irq_controller,
 						    NULL);
 		if (ret)
-			return ret;
+			goto error;
 	}
 
 	return 0;
+
+error:
+	irq_domain_free_irqs_parent(d, virq, nr_irqs);
+	return ret;
 }
 
 void gic_dev_domain_free(struct irq_domain *d, unsigned int virq,