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Message-Id: <1466176454-28084-11-git-send-email-srinivas.kandagatla@linaro.org>
Date: Fri, 17 Jun 2016 16:14:07 +0100
From: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
To: Andy Gross <andy.gross@...aro.org>
Cc: Rob Herring <robh+dt@...nel.org>,
David Brown <david.brown@...aro.org>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-soc@...r.kernel.org,
Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
Subject: [PATCH 10/16] arm64: dts: msm8996: add support to blsp2_i2c0
This patch adds support to blsp2_i2c0, which is used on some of the
APQ8096 based boards.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index ef3c370..675888f 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -151,6 +151,21 @@
reg = <0x300000 0x90000>;
};
+ blsp2_i2c0: i2c@...b5000 {
+ compatible = "qcom,i2c-qup-v2.2.1";
+ reg = <0x075b5000 0x1000>;
+ interrupts = <GIC_SPI 101 0>;
+ clocks = <&gcc GCC_BLSP2_AHB_CLK>,
+ <&gcc GCC_BLSP2_QUP1_I2C_APPS_CLK>;
+ clock-names = "iface", "core";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&blsp2_i2c0_default>;
+ pinctrl-1 = <&blsp2_i2c0_sleep>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
blsp2_uart1: serial@...0000 {
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
reg = <0x75b0000 0x1000>;
--
2.7.4
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