linux-kernel - [PATCH 06/16] arm64: dts: msm8996: add support to blsp1

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Message-Id: <1466176454-28084-7-git-send-email-srinivas.kandagatla@linaro.org>
Date:	Fri, 17 Jun 2016 16:14:03 +0100
From:	Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
To:	Andy Gross <andy.gross@...aro.org>
Cc:	Rob Herring <robh+dt@...nel.org>,
	David Brown <david.brown@...aro.org>,
	devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
	linux-soc@...r.kernel.org,
	Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
Subject: [PATCH 06/16] arm64: dts: msm8996: add support to blsp1_i2c2 device

This patch adds blsp1_i2c2 support, as this bus is used on some of the
apq8096 boards.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
---
 arch/arm64/boot/dts/qcom/msm8996.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index a1605f7..5536bfc 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -171,6 +171,21 @@
 			status = "disabled";
 		};
 
+		blsp1_i2c2: i2c@...77000 {
+			compatible = "qcom,i2c-qup-v2.2.1";
+			reg = <0x07577000 0x1000>;
+			interrupts = <GIC_SPI 97 0>;
+			clocks = <&gcc GCC_BLSP1_AHB_CLK>,
+				<&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>;
+			clock-names = "iface", "core";
+			pinctrl-names = "default", "sleep";
+			pinctrl-0 = <&blsp1_i2c2_default>;
+			pinctrl-1 = <&blsp1_i2c2_sleep>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		msmgpio: pinctrl@...0000 {
 			compatible = "qcom,msm8996-pinctrl";
 			reg = <0x01010000 0x300000>;
-- 
2.7.4