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Date:	Fri, 17 Jun 2016 11:54:22 -0400 (EDT)
From:	Vince Weaver <vincent.weaver@...ne.edu>
To:	Huang Rui <ray.huang@....com>
cc:	Borislav Petkov <bp@...e.de>, Thomas Gleixner <tglx@...utronix.de>,
	Peter Zijlstra <peterz@...radead.org>,
	Ingo Molnar <mingo@...nel.org>,
	Andy Lutomirski <luto@...capital.net>,
	Robert Richter <rric@...nel.org>,
	Jacob Shin <jacob.w.shin@...il.com>,
	Arnaldo Carvalho de Melo <acme@...nel.org>,
	Kan Liang <kan.liang@...el.com>, linux-kernel@...r.kernel.org,
	x86@...nel.org,
	Suravee Suthikulpanit <suravee.suthikulpanit@....com>,
	Aravind Gopalakrishnan <Aravind.Gopalakrishnan@....com>,
	Borislav Petkov <bp@...en8.de>,
	Guenter Roeck <linux@...ck-us.net>,
	Fengguang Wu <fengguang.wu@...el.com>
Subject: Re: [REDO PATCH v7] perf/x86/amd/power: Add AMD accumulated power
 reporting mechanism

On Fri, 17 Jun 2016, Huang Rui wrote:

> Can you try to read the MSR value two times with the same core
> (rdmsrl_on_cpu)?

I'm reading from userspace using the /dev/cpu/0/msr device so it should 
always be reading from cpu0.

I guess I could code up a custom kernel module to debug this if necessary.

It does look that for some reason the 0xc0010280 MSR is only returning the 
lower 24 bits of the PTSC, rather than the 40 bits that 
cpuid 80000008:ecx seems to think it should have.

Vince

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