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Date: Mon, 20 Jun 2016 11:50:06 +0800
From: Xinliang Liu <xinliang.liu@...aro.org>
To: p.zabel@...gutronix.de
Cc: linux-kernel@...r.kernel.org, robh+dt@...nel.org,
xuwei5@...ilicon.com, puck.chen@...ilicon.com,
saberlily.xia@...ilicon.com, kong.kongxinwei@...ilicon.com,
guodong.xu@...aro.org, Xinliang Liu <xinliang.liu@...aro.org>
Subject: [PATCH v3 3/4] reset: hisilicon: Change to syscon register access
From: Chen Feng <puck.chen@...ilicon.com>
There are two reset controllers in hi6220 SoC:
The peripheral reset controller bits are part of sysctrl registers.
The media reset controller bits are part of mediactrl registers.
So change register access to syscon way.
And rename current reset controller to peripheral one.
Signed-off-by: Chen Feng <puck.chen@...ilicon.com>
Signed-off-by: Xia Qing <saberlily.xia@...ilicon.com>
Signed-off-by: Xinliang Liu <xinliang.liu@...aro.org>
---
drivers/reset/hisilicon/hi6220_reset.c | 85 ++++++++++++++++++----------------
1 file changed, 45 insertions(+), 40 deletions(-)
diff --git a/drivers/reset/hisilicon/hi6220_reset.c b/drivers/reset/hisilicon/hi6220_reset.c
index 8f55fd4a2630..686fea9e2c54 100644
--- a/drivers/reset/hisilicon/hi6220_reset.c
+++ b/drivers/reset/hisilicon/hi6220_reset.c
@@ -1,7 +1,8 @@
/*
* Hisilicon Hi6220 reset controller driver
*
- * Copyright (c) 2015 Hisilicon Limited.
+ * Copyright (c) 2016 Linaro Limited.
+ * Copyright (c) 2015-2016 Hisilicon Limited.
*
* Author: Feng Chen <puck.chen@...ilicon.com>
*
@@ -15,81 +16,85 @@
#include <linux/module.h>
#include <linux/bitops.h>
#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/regmap.h>
+#include <linux/mfd/syscon.h>
#include <linux/reset-controller.h>
#include <linux/reset.h>
#include <linux/platform_device.h>
-#define ASSERT_OFFSET 0x300
-#define DEASSERT_OFFSET 0x304
-#define MAX_INDEX 0x509
+#define PERIPH_ASSERT_OFFSET 0x300
+#define PERIPH_DEASSERT_OFFSET 0x304
+#define PERIPH_MAX_INDEX 0x509
#define to_reset_data(x) container_of(x, struct hi6220_reset_data, rc_dev)
struct hi6220_reset_data {
- void __iomem *assert_base;
- void __iomem *deassert_base;
- struct reset_controller_dev rc_dev;
+ struct reset_controller_dev rc_dev;
+ struct regmap *regmap;
};
-static int hi6220_reset_assert(struct reset_controller_dev *rc_dev,
- unsigned long idx)
+static int hi6220_peripheral_assert(struct reset_controller_dev *rc_dev,
+ unsigned long idx)
{
struct hi6220_reset_data *data = to_reset_data(rc_dev);
+ struct regmap *regmap = data->regmap;
+ u32 bank = idx >> 8;
+ u32 offset = idx & 0xff;
+ u32 reg = PERIPH_ASSERT_OFFSET + bank * 0x10;
- int bank = idx >> 8;
- int offset = idx & 0xff;
-
- writel(BIT(offset), data->assert_base + (bank * 0x10));
-
- return 0;
+ return regmap_write(regmap, reg, BIT(offset));
}
-static int hi6220_reset_deassert(struct reset_controller_dev *rc_dev,
- unsigned long idx)
+static int hi6220_peripheral_deassert(struct reset_controller_dev *rc_dev,
+ unsigned long idx)
{
struct hi6220_reset_data *data = to_reset_data(rc_dev);
+ struct regmap *regmap = data->regmap;
+ u32 bank = idx >> 8;
+ u32 offset = idx & 0xff;
+ u32 reg = PERIPH_DEASSERT_OFFSET + bank * 0x10;
- int bank = idx >> 8;
- int offset = idx & 0xff;
-
- writel(BIT(offset), data->deassert_base + (bank * 0x10));
-
- return 0;
+ return regmap_write(regmap, reg, BIT(offset));
}
-static const struct reset_control_ops hi6220_reset_ops = {
- .assert = hi6220_reset_assert,
- .deassert = hi6220_reset_deassert,
+static const struct reset_control_ops hi6220_peripheral_reset_ops = {
+ .assert = hi6220_peripheral_assert,
+ .deassert = hi6220_peripheral_deassert,
};
static int hi6220_reset_probe(struct platform_device *pdev)
{
+ struct device_node *np = pdev->dev.of_node;
+ struct device *dev = &pdev->dev;
struct hi6220_reset_data *data;
- struct resource *res;
- void __iomem *src_base;
+ struct regmap *regmap;
- data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
+ data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- src_base = devm_ioremap_resource(&pdev->dev, res);
- if (IS_ERR(src_base))
- return PTR_ERR(src_base);
+ regmap = syscon_node_to_regmap(np);
+ if (IS_ERR(regmap)) {
+ dev_err(dev, "failed to get reset controller regmap\n");
+ return PTR_ERR(regmap);
+ }
- data->assert_base = src_base + ASSERT_OFFSET;
- data->deassert_base = src_base + DEASSERT_OFFSET;
- data->rc_dev.nr_resets = MAX_INDEX;
- data->rc_dev.ops = &hi6220_reset_ops;
- data->rc_dev.of_node = pdev->dev.of_node;
+ data->regmap = regmap;
+ data->rc_dev.of_node = np;
+ data->rc_dev.ops = &hi6220_peripheral_reset_ops;
+ data->rc_dev.nr_resets = PERIPH_MAX_INDEX;
return reset_controller_register(&data->rc_dev);
}
static const struct of_device_id hi6220_reset_match[] = {
- { .compatible = "hisilicon,hi6220-sysctrl" },
- { },
+ {
+ .compatible = "hisilicon,hi6220-sysctrl",
+ },
+ { /* sentinel */ },
};
+MODULE_DEVICE_TABLE(of, hi6220_reset_match);
static struct platform_driver hi6220_reset_driver = {
.probe = hi6220_reset_probe,
--
2.8.3
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