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Message-Id: <1466445414-11974-2-git-send-email-dianders@chromium.org>
Date:	Mon, 20 Jun 2016 10:56:40 -0700
From:	Douglas Anderson <dianders@...omium.org>
To:	ulf.hansson@...aro.org, Heiko Stuebner <heiko@...ech.de>
Cc:	kishon@...com, robh+dt@...nel.org, shawn.lin@...k-chips.com,
	xzy.xu@...k-chips.com, briannorris@...omium.org,
	adrian.hunter@...el.com, linux-rockchip@...ts.infradead.org,
	linux-mmc@...r.kernel.org, devicetree@...r.kernel.org,
	groeck@...omium.org, Douglas Anderson <dianders@...omium.org>,
	linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: [PATCH v3 01/15] phy: rockchip-emmc: give DLL some extra time to be ready

From: Shawn Lin <shawn.lin@...k-chips.com>

According to the databook, 10.2us is the max time for dll to be ready to
work. However in testing, some chips need 20us for dll to be ready. This
patch adds some extra margin for dllrdy to be ready, fixing our
-ETIMEDOUT issues.

Signed-off-by: Shawn Lin <shawn.lin@...k-chips.com>
Signed-off-by: Brian Norris <briannorris@...omium.org>
Signed-off-by: Douglas Anderson <dianders@...omium.org>
Acked-by: Kishon Vijay Abraham I <kishon@...com>
Tested-by: Heiko Stuebner <heiko@...ech.de>
---
Changes in v3:
- Add Brian's PHY patches into my series

Changes in v2: None

 drivers/phy/phy-rockchip-emmc.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/phy/phy-rockchip-emmc.c b/drivers/phy/phy-rockchip-emmc.c
index 6ebcf3e41c46..48cbe691a889 100644
--- a/drivers/phy/phy-rockchip-emmc.c
+++ b/drivers/phy/phy-rockchip-emmc.c
@@ -119,10 +119,11 @@ static int rockchip_emmc_phy_power(struct rockchip_emmc_phy *rk_phy,
 				   PHYCTRL_ENDLL_MASK,
 				   PHYCTRL_ENDLL_SHIFT));
 	/*
-	 * After enable analog DLL circuits, we need extra 10.2us
-	 * for dll to be ready for work.
+	 * After enable analog DLL circuits, we need an extra 10.2us
+	 * for dll to be ready for work. But according to testing, we
+	 * find some chips need more than 25us.
 	 */
-	udelay(11);
+	udelay(30);
 	regmap_read(rk_phy->reg_base,
 		    rk_phy->reg_offset + GRF_EMMCPHY_STATUS,
 		    &dllrdy);
-- 
2.8.0.rc3.226.g39d4020

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