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Message-Id: <1466484811-26923-1-git-send-email-zhengxing@rock-chips.com>
Date:	Tue, 21 Jun 2016 12:53:26 +0800
From:	Xing Zheng <zhengxing@...k-chips.com>
To:	heiko@...ech.de
Cc:	linux-rockchip@...ts.infradead.org,
	Xing Zheng <zhengxing@...k-chips.com>,
	devicetree@...r.kernel.org,
	Michael Turquette <mturquette@...libre.com>,
	Yakir Yang <ykk@...k-chips.com>,
	Stephen Boyd <sboyd@...eaurora.org>,
	linux-kernel@...r.kernel.org, Kumar Gala <galak@...eaurora.org>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Rob Herring <robh+dt@...nel.org>,
	Jeffy Chen <jeffy.chen@...k-chips.com>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Caesar Wang <wxt@...k-chips.com>, linux-clk@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org
Subject: [PATCH 0/5] Fix and improve clock controller for the RK322x SoCs


Hi,
  These patchset fix some clocks bugs, and improve clock configuration
for i2s/spdif/MAC on RK322x SoCs.

Thanks.


Xing Zheng (5):
  clk: rockchip: rk3228: fix incorrect clock node names
  clk: rockchip: rk3228: include downstream muxes into fractional
    dividers
  clk: rockchip: rk3228: export related i2s/spdif clocks
  clk: rockchip: rk3228: rename sclk_macphy_50m to sclk_mac_extclk
  clk: rockchip: rk3228: export related MAC clocks

 drivers/clk/rockchip/clk-rk3228.c      |  125 +++++++++++++++++++-------------
 include/dt-bindings/clock/rk3228-cru.h |   15 ++++
 2 files changed, 89 insertions(+), 51 deletions(-)

-- 
1.7.9.5


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