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Message-ID: <20160621093739.GO30154@twins.programming.kicks-ass.net>
Date:	Tue, 21 Jun 2016 11:37:39 +0200
From:	Peter Zijlstra <peterz@...radead.org>
To:	"Odzioba, Lukasz" <lukasz.odzioba@...el.com>
Cc:	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"x86@...nel.org" <x86@...nel.org>,
	"tglx@...utronix.de" <tglx@...utronix.de>,
	"mingo@...hat.com" <mingo@...hat.com>,
	"hpa@...or.com" <hpa@...or.com>,
	"ak@...ux.intel.com" <ak@...ux.intel.com>,
	"Liang, Kan" <kan.liang@...el.com>,
	"akpm@...ux-foundation.org" <akpm@...ux-foundation.org>,
	"eranian@...gle.com" <eranian@...gle.com>,
	"acme@...nel.org" <acme@...nel.org>,
	"alexander.shishkin@...ux.intel.com" 
	<alexander.shishkin@...ux.intel.com>, "bp@...e.de" <bp@...e.de>,
	"Anaczkowski, Lukasz" <lukasz.anaczkowski@...el.com>
Subject: Re: [PATCH 1/1] perf/x86/intel: Add extended event constraints for
 Knights Landing

On Mon, Jun 20, 2016 at 10:26:30AM +0000, Odzioba, Lukasz wrote:
> On 08.06.2016 Peter Zijlstra wrote:
> > How does this work in the light of intel_alt_er() ?
> 
> Hi Peter,
> 
> If the constrained bit is valid on only one of the OCR MSRs (like in case of KNL), 
> then OCR valid mask will forbid altering it by the other MSR in intel_alt_er.

Yes, that is the intent, but how is this achieved? I'm not sure I see
how the patch ensure this.

Also, intel_get_event_constraints() has a path where it copies the
constraint, should it not also copy the new field?

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