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Message-ID: <1466596043-27262-5-git-send-email-ldewangan@nvidia.com>
Date: Wed, 22 Jun 2016 17:17:22 +0530
From: Laxman Dewangan <ldewangan@...dia.com>
To: <thierry.reding@...il.com>, <robh+dt@...nel.org>,
<swarren@...dotorg.org>, <gnurou@...il.com>
CC: <linux-pwm@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-tegra@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
Laxman Dewangan <ldewangan@...dia.com>
Subject: [PATCH 4/5] pwm: tegra: Add DT node compatible for Tegra186
Tegra186 has 8 different PWM controller and each controller has only
one output. Earlier generation SoCs have the 4 PWM output per controller.
Add DT node compatible for Tegra186.
Signed-off-by: Laxman Dewangan <ldewangan@...dia.com>
---
Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
index c52f03b..2851b2d 100644
--- a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
+++ b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
@@ -1,10 +1,12 @@
Tegra SoC PWFM controller
Required properties:
-- compatible: For Tegra20, must contain "nvidia,tegra20-pwm". For Tegra30,
- must contain "nvidia,tegra30-pwm". Otherwise, must contain
- "nvidia,<chip>-pwm", plus one of the above, where <chip> is tegra114,
- tegra124, tegra132, or tegra210.
+- compatible: For Tegra20, must contain "nvidia,tegra20-pwm".
+ For Tegra30, must contain "nvidia,tegra30-pwm".
+ For Tegra114, Tegra124, Tegra132, Tegra210 must contain
+ "nvidia,<chip>-pwm", plus one of the above, where <chip> is
+ tegra114, tegra124, tegra132, or tegra210.
+ For Tegra186, must contain "nvidia,tegra186-pwm".
- reg: physical base address and length of the controller's registers
- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
the cells format.
--
2.1.4
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