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Message-ID: <alpine.DEB.2.11.1606231033530.5839@nanos>
Date: Thu, 23 Jun 2016 10:35:45 +0200 (CEST)
From: Thomas Gleixner <tglx@...utronix.de>
To: Zhaoyang Huang <zhaoyang.huang@...aro.org>
cc: Daniel Lezcano <daniel.lezcano@...aro.org>,
Geng Ren <geng.ren@...eadtrum.com>,
Alex Wang <alex.wang@...eadtrum.com>,
Vincent Guittot <vincent.guittot@...aro.org>,
linux-kernel@...r.kernel.org, linux-pm@...r.kernel.org,
mingo@...hat.com, peterz@...radead.org,
Zhaoyang Huang (黄朝阳)
<zhaoyang.huang@...eadtrum.com>
Subject: Re: [RESEND PATCH v2 2/2] power/idle: enhance the precision of
sleep_length
On Thu, 23 Jun 2016, Zhaoyang Huang wrote:
> On 23 June 2016 at 16:18, Thomas Gleixner <tglx@...utronix.de> wrote:
> > On Thu, 23 Jun 2016, Zhaoyang Huang wrote:
> >> On 23 June 2016 at 15:01, Thomas Gleixner <tglx@...utronix.de> wrote:
> >> Thomas, I agree with you, I have discussed the modification with the
> >> call back owner. However, I wonder if we can make the idle's framework
> >> to be more precised without the assumption of short CPU_PM_ENTER
> >> callbacks. Thank you!
> >
> > What's the point? To help people who put insanities into the idle code path?
> >
> > Thanks,
> >
> > tglx
> >
> Hi, Thomas. If the entry,exit,min time of one idle state sums up to
> 500us in some platform, the 100us callback which should be common as
> caused by cache miss would also generate 20% imprecision. Don't you
A cache miss is causing a 100us callback? What are you talking about?
Thanks,
tglx
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