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Message-ID: <20160627143735.GC21398@kuha.fi.intel.com>
Date: Mon, 27 Jun 2016 17:37:35 +0300
From: Heikki Krogerus <heikki.krogerus@...ux.intel.com>
To: "Rafael J. Wysocki" <rafael@...nel.org>
Cc: Bin Gao <bin.gao@...ux.intel.com>,
"Rafael J. Wysocki" <rjw@...ysocki.net>,
Aaron Lu <aaron.lu@...el.com>,
Paul Gortmaker <paul.gortmaker@...driver.com>,
ACPI Devel Maling List <linux-acpi@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
ysiyer <yegnesh.s.iyer@...el.com>,
Ajay Thomas <ajay.thomas.david.rajamanickam@...el.com>,
Bin Gao <bin.gao@...el.com>
Subject: Re: [PATCH v4 3/3] acpi/pmic: Add support for PMIC regs operation
region
On Mon, Jun 27, 2016 at 03:25:11PM +0200, Rafael J. Wysocki wrote:
> On Mon, Jun 27, 2016 at 11:26 AM, Heikki Krogerus
> <heikki.krogerus@...ux.intel.com> wrote:
> > Whoa! Hold on!
> >
> > On Thu, Jun 23, 2016 at 05:52:53PM -0700, Bin Gao wrote:
> >> Broxton platform firmware has defined new customized operation regions
> >> called regs for PMIC chip - regs op region is used to handle the
> >> PMIC gpio mainly intended for the TYPE-C VBUS and Orientation.
> >>
> >> The intel_gpio_ctx structure is created for the purpose of handling
> >> the PMIC gpio register read and write.
> >>
> >> Signed-off-by: Felipe Balbi <felipe.balbi@...ux.intel.com>
> >> Signed-off-by: Chandra Sekhar Anagani <chandra.sekhar.anagani@...el.com>
> >> Signed-off-by: Bin Gao <bin.gao@...el.com>
> >> ---
> >> Changes in v4:
> >> - various fixes to address Aaron's comments.
> >> Changes in v3: none
> >> Changes in v2: none
> >> drivers/acpi/pmic/intel_pmic.c | 74 ++++++++++++++++++++++++++++++++++++++++--
> >> drivers/acpi/pmic/intel_pmic.h | 5 +++
> >> 2 files changed, 76 insertions(+), 3 deletions(-)
> >>
> >> diff --git a/drivers/acpi/pmic/intel_pmic.c b/drivers/acpi/pmic/intel_pmic.c
> >> index 410e96f..e11d1e0 100644
> >> --- a/drivers/acpi/pmic/intel_pmic.c
> >> +++ b/drivers/acpi/pmic/intel_pmic.c
> >> @@ -21,12 +21,14 @@
> >>
> >> #define PMIC_POWER_OPREGION_ID 0x8d
> >> #define PMIC_THERMAL_OPREGION_ID 0x8c
> >> +#define PMIC_REGS_OPREGION_ID 0x8f
> >>
> >> struct intel_pmic_opregion {
> >> struct mutex lock;
> >> struct acpi_lpat_conversion_table *lpat_table;
> >> struct regmap *regmap;
> >> struct intel_pmic_opregion_data *data;
> >> + struct pmic_gpio_ctx ctx;
> >
> > What gpio?
> >
> >> };
> >>
> >> static int pmic_get_reg_bit(int address, struct pmic_table *table,
> >> @@ -204,6 +206,56 @@ static acpi_status intel_pmic_thermal_handler(u32 function,
> >> return AE_OK;
> >> }
> >>
> >> +static acpi_status intel_pmic_gpio_handler(u32 function,
> >> + acpi_physical_address address, u32 bits, u64 *value64,
> >> + void *handler_context, void *region_context)
> >
> > What the heck is this? Why is this suddenly a gpio handler?
> >
> > This is handler for an operation region, not some gpio!
>
> OK
>
> What about if I replaced this one with the original one from Felipe you sent?
That works for me.
Thanks,
--
heikki
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