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Message-ID: <70de38d1-2743-09dd-dc47-6242799a701c@redhat.com>
Date:	Tue, 28 Jun 2016 22:49:17 +0200
From:	Paolo Bonzini <pbonzini@...hat.com>
To:	Bandan Das <bsd@...hat.com>
Cc:	kvm@...r.kernel.org, guangrong.xiao@...ux.intel.com,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/5] mmu: mark spte present if the x bit is set



On 28/06/2016 22:37, Bandan Das wrote:
> Paolo Bonzini <pbonzini@...hat.com> writes:
> 
>> On 28/06/2016 19:33, Bandan Das wrote:
>>>>>>>  static int is_shadow_present_pte(u64 pte)
>>>>>>>  {
>>>>>>> -	return pte & PT_PRESENT_MASK && !is_mmio_spte(pte);
>>>>>>> +	return pte & (PT_PRESENT_MASK | shadow_x_mask) &&
>>>>>>> +		!is_mmio_spte(pte);
>>>>>
>>>>> This should really be pte & 7 when using EPT.  But this is okay as an
>>>>> alternative to a new shadow_present_mask.
>>> I could revive shadow_xonly_valid probably... Anyway, for now I will
>>> add a TODO comment here.
>>
>> It's okay to it like this, because the only invalid PTEs reaching this
>> point are those that is_mmio_spte filters away.  Hence you'll never get
>> -W- PTEs here, and pte & 7 is really the same as how you wrote it.  It's
>> pretty clever, and doesn't need a TODO at all. :)
> 
> Thanks, understood. So, the way it is written now covers all cases for
> pte & 7. Let's still add a comment - clever things are usually
> confusing to many!

I think another way to write it is "(pte & 0xFFFFFFFFull) &&
!is_mmio_spte(pte)", since non-present/non-MMIO SPTEs never use bits
1..31 (they can have non-zero bits 32..63 on 32-bit CPUs where we don't
update the PTEs atomically).  Guangrong, what do you prefer?

Paolo

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