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Message-ID: <1467284187-13320-5-git-send-email-jonathanh@nvidia.com>
Date: Thu, 30 Jun 2016 11:56:27 +0100
From: Jon Hunter <jonathanh@...dia.com>
To: Stephen Warren <swarren@...dotorg.org>,
Thierry Reding <thierry.reding@...il.com>,
Alexandre Courbot <gnurou@...il.com>
CC: <linux-tegra@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
Jon Hunter <jonathanh@...dia.com>
Subject: [PATCH 4/4] arm64: tegra210: Add XUSB powergates
The Tegra210 XUSB subsystem has 3 power partitions which are XUSBA
(super-speed logic), XUSBB (USB device logic) and XUSBC (USB host
logic). Populate the device-tree nodes for these XUSB partitions.
Signed-off-by: Jon Hunter <jonathanh@...dia.com>
---
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
index 65b829b762bb..efb0fd98b789 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
@@ -670,6 +670,30 @@
<&tegra_car TEGRA210_CLK_MIPI_CAL>;
#power-domain-cells = <0>;
};
+
+ pd_xusbss: xusba {
+ clocks = <&tegra_car TEGRA210_CLK_XUSB_SS>;
+ clock-names = "xusb_ss";
+ resets = <&tegra_car TEGRA210_CLK_XUSB_SS>;
+ reset-names = "xusb_ss";
+ #power-domain-cells = <0>;
+ };
+
+ pd_xusbdev: xusbb {
+ clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>;
+ clock-names = "xusb_dev";
+ resets = <&tegra_car 95>;
+ reset-names = "xusb_dev";
+ #power-domain-cells = <0>;
+ };
+
+ pd_xusbhost: xusbc {
+ clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>;
+ clock-names = "xusb_host";
+ resets = <&tegra_car TEGRA210_CLK_XUSB_HOST>;
+ reset-names = "xusb_host";
+ #power-domain-cells = <0>;
+ };
};
};
--
2.1.4
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