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Message-Id: <1467303739-12543-9-git-send-email-mathieu.poirier@linaro.org>
Date: Thu, 30 Jun 2016 10:22:14 -0600
From: Mathieu Poirier <mathieu.poirier@...aro.org>
To: gregkh@...uxfoundation.org
Cc: linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: [PATCH 08/13] coresight: etmv4: Fix ETMv4x peripheral ID table
From: Suzuki K Poulose <suzuki.poulose@....com>
This patch cleans up the peripheral id table for different ETMv4
implementations.
As per Cortex-A53 TRM, the ETM has following id values:
Peripheral ID0 0x5D 0xFE0
Peripheral ID1 0xB9 0xFE4
Peripheral ID2 0x4B 0xFE8
Peripheral ID3 0x00 0xFEC
where, PID2: has the following format:
[7:4] Revision
[3] JEDEC 0b1 res1. Indicates a JEP106 identity code is used
[2:0] DES_1 0b011 ARM Limited. This is bits[6:4] of JEP106 ID code
The existing table entry checks only the bits [1:0], which is not
sufficient enough. Fix it to match bits [3:0], just like the other
entries do. While at it, correct the comment for A57 and the A53 entry.
Cc: Mathieu Poirier <mathieu.poirier@...aro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@....com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@...aro.org>
---
drivers/hwtracing/coresight/coresight-etm4x.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c
index 4c4f40cbe34e..ee089a7a7e87 100644
--- a/drivers/hwtracing/coresight/coresight-etm4x.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x.c
@@ -801,12 +801,12 @@ err_arch_supported:
}
static struct amba_id etm4_ids[] = {
- { /* ETM 4.0 - Qualcomm */
- .id = 0x0003b95d,
- .mask = 0x0003ffff,
+ { /* ETM 4.0 - Cortex-A53 */
+ .id = 0x000bb95d,
+ .mask = 0x000fffff,
.data = "ETM 4.0",
},
- { /* ETM 4.0 - Juno board */
+ { /* ETM 4.0 - Cortex-A57 */
.id = 0x000bb95e,
.mask = 0x000fffff,
.data = "ETM 4.0",
--
2.7.4
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