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Date:	Fri, 1 Jul 2016 07:37:10 +0200
From:	Jean-Francois Moine <moinejf@...e.fr>
To:	Ondřej Jirman <megous@...ous.com>
Cc:	Maxime Ripard <maxime.ripard@...e-electrons.com>,
	Mark Rutland <mark.rutland@....com>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
	<devicetree@...r.kernel.org>, dev@...ux-sunxi.org,
	Michael Turquette <mturquette@...libre.com>,
	Stephen Boyd <sboyd@...eaurora.org>,
	open list <linux-kernel@...r.kernel.org>,
	Emilio López <emilio@...pez.com.ar>,
	Chen-Yu Tsai <wens@...e.org>, Rob Herring <robh+dt@...nel.org>,
	"open list:COMMON CLK FRAMEWORK" <linux-clk@...r.kernel.org>,
	linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v2 06/14] ARM: sun8i: clk: Add clk-factor rate
 application method

On Fri, 1 Jul 2016 02:50:57 +0200
Ondřej Jirman <megous@...ous.com> wrote:

> > Since this is really specific, I guess you could simply make the
> > clk_ops for the nkmp clocks public, and just re-implement set_rate
> > using that logic.
> 
> I would argue that this may be necessary for other PLL clocks too, if
> you can get out of bounds output frequency, by changing the dividers too
> early or too late. So perhaps this code should be generalized for other
> PLL clocks too, instead.

The documentation says that only the CPU and DDR PLLs can be dynamically
changed after boot.

-- 
Ken ar c'hentañ	|	      ** Breizh ha Linux atav! **
Jef		|		http://moinejf.free.fr/

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