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Message-ID: <20160701183845.GD27880@codeaurora.org>
Date:	Fri, 1 Jul 2016 11:38:45 -0700
From:	Stephen Boyd <sboyd@...eaurora.org>
To:	Hoan Tran <hotran@....com>
Cc:	Michael Turquette <mturquette@...libre.com>,
	linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
	Duc Dang <dhdang@....com>, lho@....com
Subject: Re: [PATCH v2] clk: Add fractional scale clock support

Sorry I replied offlist before. Pressed the wrong key.

On 06/30, Hoan Tran wrote:
> On Thu, Jun 30, 2016 at 1:23 PM, Stephen Boyd <sboyd@...eaurora.org> wrote:
> >
> > How is this different from clk-fractional-divider.c?
> >
> 
> This is a driver which clock output is multiplied with a fixed fractional
> scale (denominator).
> A field inside a register is used to configure the multiplier.
> 
> Example: With fractional scale is 1/8.
> Freq_out = Freq_parent * multiplier * (1/8)
> 
> For fractional-divider, there are 2 fields of a register are used which
>  - A field for numerator
>  - A field for denominator
> Freq_out = Freq_parent * numerator / denominator
> 

Ok so the difference is that the denominator is a fixed value?
Perhaps that can be modeled as a clk-multiplier that is used as
the only parent of a fixed divider? Or we can add a flag to the
clk-fractional-divider code to handle this minor difference.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

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