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Message-ID: <20160702004504.GM27880@codeaurora.org>
Date: Fri, 1 Jul 2016 17:45:04 -0700
From: Stephen Boyd <sboyd@...eaurora.org>
To: Dong Aisheng <aisheng.dong@....com>
Cc: linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
mturquette@...libre.com, shawnguo@...nel.org,
linux-arm-kernel@...ts.infradead.org, anson.huang@....com
Subject: Re: [PATCH V3 4/8] clk: core: support clocks which requires parents
enable (part 2)
On 06/30, Dong Aisheng wrote:
> On Freescale i.MX7D platform, all clocks operations, including
> enable/disable, rate change and re-parent, requires its parent clock on.
> Current clock core can not support it well.
> This patch adding flag CLK_OPS_PARENT_ENABLE to handle this special case in
> clock core that enable its parent clock firstly for each operation and
> disable it later after operation complete.
>
> The patch part 2 fixes set clock rate and set parent while its parent
> is off. The most special case is for set_parent() operation which requires
> all parents including both old and new one to be enabled at the same time
> during the operation.
>
> Cc: Michael Turquette <mturquette@...libre.com>
> Cc: Stephen Boyd <sboyd@...eaurora.org>
> Cc: Shawn Guo <shawnguo@...nel.org>
> Signed-off-by: Dong Aisheng <aisheng.dong@....com>
> ---
Applied to clk-next
> @@ -1502,6 +1514,9 @@ static void clk_change_rate(struct clk_core *core)
>
> trace_clk_set_rate(core, core->new_rate);
>
> + if (core->flags & CLK_OPS_PARENT_ENABLE)
> + clk_core_prepare_enable(parent);
> +
I swapped this with trace_clk_set_rate() so the tracepoint is
closer to the hw operation.
> if (!skip_set_rate && core->ops->set_rate)
> core->ops->set_rate(core->hw, core->new_rate, best_parent_rate);
>
--
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