linux-kernel - Re: [PATCH RFC 6/7] clk: imx: pllv3: convert to prepare_hw and set_rate

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <CAOMZO5DnFevNf6tdJ62woC33Mv3cGgTYLkOq6OOz+3RxZJpnMQ@mail.gmail.com>
Date:	Sat, 2 Jul 2016 17:30:11 -0300
From:	Fabio Estevam <festevam@...il.com>
To:	Dong Aisheng <aisheng.dong@....com>
Cc:	linux-clk@...r.kernel.org,
	linux-kernel <linux-kernel@...r.kernel.org>,
	Stephen Boyd <sboyd@...eaurora.org>,
	Michael Turquette <mturquette@...libre.com>,
	Shawn Guo <shawnguo@...nel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Stefan Agner <stefan@...er.ch>,
	Lucas Stach <l.stach@...gutronix.de>,
	Cyrille Pitchen <cyrille.pitchen@...el.com>,
	manabian@...il.com, Yongcai Huang <anson.huang@....com>
Subject: Re: [PATCH RFC 6/7] clk: imx: pllv3: convert to prepare_hw and set_rate_hw

Hi Dong,

On Wed, Jun 29, 2016 at 10:52 AM, Dong Aisheng <aisheng.dong@....com> wrote:

Thanks for working on this series.

Tested the whole series on a mx7d-sdb and it does fix the several clk
warnings that we currently have.

> +static int clk_pllv3_set_rate_done(struct clk_hw *hw)
> +{
> +       struct clk_pllv3 *pll = to_clk_pllv3(hw);
> +       u32 val = readl_relaxed(pll->base) & pll->powerdown;

I had to change this to:

--- a/drivers/clk/imx/clk-pllv3.c
+++ b/drivers/clk/imx/clk-pllv3.c
@@ -108,7 +108,7 @@ static long clk_pllv3_round_rate(struct clk_hw *hw, unsigned
 static int clk_pllv3_set_rate_done(struct clk_hw *hw)
 {
        struct clk_pllv3 *pll = to_clk_pllv3(hw);
-       u32 val = readl_relaxed(pll->base) & pll->powerdown;
+       u32 val = readl_relaxed(pll->base) & pll->power_bit;

,so that it can build against linux-next.