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Message-ID: <20160705061211.GA7643@lukather>
Date: Tue, 5 Jul 2016 08:12:11 +0200
From: Maxime Ripard <maxime.ripard@...e-electrons.com>
To: Icenowy Zheng <icenowy@...c.xyz>
Cc: rui.zhang@...el.com, edubezval@...il.com, robh+dt@...nel.org,
wens@...e.org, emilio@...pez.com.ar, mark.rutland@....com,
linux@...linux.org.uk, mturquette@...libre.com,
sboyd@...eaurora.org, linux-pm@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org
Subject: Re: [RFC PATCH 1/5] clk: sunxi: Add a driver for the PLL2 on
A31/23/33
Hi,
On Tue, Jun 28, 2016 at 06:13:21PM +0800, Icenowy Zheng wrote:
> This is based on the PLL2 driver for A10/20.
Thanks for this patch.
However, as you might have seen, we're switching to a new clock code
base, so it would be great if you could use that instead.
http://lists.infradead.org/pipermail/linux-arm-kernel/2016-June/440077.html
While we declared all the clocks for the H3, nothing really mandates
that for the existing platforms we don't introduce a few clocks as
they are needed. That will probably even smoothen the transition.
Thanks,
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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