linux-kernel - Re: Subject: PROBLEM: CPU accounting/scheduling regression in v4.6 CPU scheduling patchset?

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Date:	Tue, 5 Jul 2016 10:13:38 +0200
From:	Peter Zijlstra <peterz@...radead.org>
To:	Vladimir Panteleev <thecybershadow@...il.com>
Cc:	Thomas Gleixner <tglx@...utronix.de>,
	Ingo Molnar <mingo@...hat.com>,
	"H. Peter Anvin" <hpa@...or.com>, x86@...nel.org,
	linux-kernel@...r.kernel.org
Subject: Re: Subject: PROBLEM: CPU accounting/scheduling regression in v4.6
 CPU scheduling patchset?

On Sun, Jul 03, 2016 at 05:24:11PM +0000, Vladimir Panteleev wrote:
> dmesg output:
> https://dump.v.panteleev.md/b8a3ba608a914a3d70667dad697dddfb/1467563818.log

[    0.059350] smpboot: CPU0: Intel(R) Core(TM) i7-4960X CPU @ 3.60GHz (family: 0x6, model: 0x3e, stepping: 0x4)

...

[    0.069372] x86: Booting SMP configuration:
[    0.069375] .... node  #0, CPUs:        #1
[    0.132420] TSC synchronization [CPU#0 -> CPU#1]:
[    0.132427] Measured 170505122558937 cycles TSC warp between CPUs, turning off TSC clock.
[    0.132435] tsc: Marking TSC unstable due to check_tsc_sync_source failed
[    0.136636]   #2  #3  #4  #5  #6  #7  #8  #9 #10 #11
[    0.773136] x86: Booted up 1 node, 12 CPUs


How can TSC be borken on single socket IvyBridge !?