linux-kernel - [PATCH v2 2/2] arm64: dts: rockchip: support the pmu node for rk3399

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Message-Id: <1467792357-9749-3-git-send-email-wxt@rock-chips.com>
Date:	Wed,  6 Jul 2016 16:05:57 +0800
From:	Caesar Wang <wxt@...k-chips.com>
To:	Marc Zyngier <marc.zyngier@....com>,
	Heiko Stuebner <heiko@...ech.de>
Cc:	dianders@...omium.org, mark.rutland@....com,
	linux-rockchip@...ts.infradead.org, cf@...k-chips.com,
	huangtao@...k-chips.com, linux-arm-kernel@...ts.infradead.org,
	Caesar Wang <wxt@...k-chips.com>,
	Rob Herring <robh+dt@...nel.org>,
	Catalin Marinas <catalin.marinas@....com>,
	Will Deacon <will.deacon@....com>,
	Brian Norris <briannorris@...omium.org>,
	Jianqun Xu <jay.xu@...k-chips.com>,
	David Wu <david.wu@...k-chips.com>,
	Xing Zheng <zhengxing@...k-chips.com>,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [PATCH v2 2/2] arm64: dts: rockchip: support the pmu node for rk3399

This patch add to enable the ARM Performance Monitor Units for rk3399.
ARM cores often have a PMU for counting cpu and cache events like cache
misses and hits.

Also, as the Marc posted the patches [0] to support Partitioning per-cpu
interrupts. Let's add this patch to match it on rk3399 SoCs.

[0]:
https://lkml.org/lkml/2016/4/11/182
https://patchwork.kernel.org/patch/9209369/

Signed-off-by: Caesar Wang <wxt@...k-chips.com>
Cc: Heiko Stuebner <heiko@...ech.de>
Cc: Marc Zyngier <marc.zyngier@....com>
CC: linux-arm-kernel@...ts.infradead.org

---

Changes in v2:
- AS Mark comments on https://patchwork.kernel.org/patch/9209369/
  remove the interrupt-affinity property, we need depend on Marc' perf
  code on https://patchwork.kernel.org/patch/9209369/.

 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 8f0a069..4bcd02b 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -165,6 +165,16 @@
 			     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW 0>;
 	};
 
+	pmu_a53 {
+		compatible = "arm,cortex-a53-pmu";
+		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &part0>;
+	};
+
+	pmu_a72 {
+		compatible = "arm,cortex-a72-pmu";
+		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &part1>;
+	};
+
 	xin24m: xin24m {
 		compatible = "fixed-clock";
 		clock-frequency = <24000000>;
@@ -296,6 +306,16 @@
 			msi-controller;
 			reg = <0x0 0xfee20000 0x0 0x20000>;
 		};
+
+		ppi-partitions {
+			part0: interrupt-partition-0 {
+				affinity = <&cpu_l0 &cpu_l1 &cpu_l2 &cpu_l3>;
+			};
+
+			part1: interrupt-partition-1 {
+				affinity = <&cpu_b0 &cpu_b1>;
+			};
+		};
 	};
 
 	i2c1: i2c@...10000 {
-- 
1.9.1