lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20160706114600.GD23527@lahna.fi.intel.com>
Date:	Wed, 6 Jul 2016 14:46:00 +0300
From:	Mika Westerberg <mika.westerberg@...ux.intel.com>
To:	linux-mtd@...ts.infradead.org
Cc:	Brian Norris <computersforpeace@...il.com>,
	David Woodhouse <dwmw2@...radead.org>,
	Lee Jones <lee.jones@...aro.org>,
	Peter Tyser <ptyser@...-inc.com>, key.seong.lim@...el.com,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 0/3] spi-nor: Add support for Intel SPI serial flash
 controller

On Wed, Jun 22, 2016 at 06:32:42PM +0300, Mika Westerberg wrote:
> Hi,
> 
> This is second version of the series. The first version can be found here:
> 
>   https://lkml.org/lkml/2016/6/14/269
> 
> This adds support for the Intel SPI serial flash controller found on many
> recent Intel CPUs including Baytrail and Braswell. This driver makes it
> possible to access the BIOS and other platform data which is stored on the
> SPI serial flash. It is also possible to upgrade the BIOS using this driver
> if it has not been protected by special hardware bits.
> 
> The patch [1/3] includes documentation how to upgrade BIOS on MinnowBoard
> MAX.
> 
> Since poking the SPI serial flash can brick the machine, this driver can
> only be enabled when CONFIG_EXPERT=y and even then it will remain read-only
> unless instructed othwerwise by module parameter.
> 
> Changes from v1:
> 
> [1/3] spi-nor: Add support for Intel SPI serial flash controller
> 
>   * Older hardware does not support 64k erase command so added erase_64k
>     flag which is set only for Broxton (BXT).
> 
>   * Fix protection range offset for Broxton. Now there is ispi->pregs
>     pointing to the start of the protection registers.
> 
>   * Change naming of constants from BCR_BYT -> BYT_BCR and so on.
> 
> [2/3] mfd: lpc_ich: Add support for SPI serial flash host controller
> 
>   * Drop lpc_ich_finalize_spi_cell() and initialize cell directly in
>     lpc_ich_init_spi().
> 
>   * Use info->type in switch in lpc_ich_init_spi().
> 
>   * Add defines for magic numbers used in lpc_ich_init_spi().
> 
>   * Use PLATFORM_DEVID_NONE with mfd_add_devices().
> 
> [3/3] mfd: lpc_ich: Add support for Intel Apollo Lake SoC
> 
>   * No changes
> 
> Mika Westerberg (3):
>   spi-nor: Add support for Intel SPI serial flash controller
>   mfd: lpc_ich: Add support for SPI serial flash host controller
>   mfd: lpc_ich: Add support for Intel Apollo Lake SoC

Ping. Any comments on this?

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ