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Date: Thu, 07 Jul 2016 14:46:20 +0200 From: Krzysztof Kozlowski <k.kozlowski@...sung.com> To: Andi Shyti <andi.shyti@...sung.com>, Chanwoo Choi <cw00.choi@...sung.com> Cc: Jaehoon Chung <jh80.chung@...sung.com>, Sylwester Nawrocki <s.nawrocki@...sung.com>, Tomasz Figa <tomasz.figa@...il.com>, Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...eaurora.org>, Kukjin Kim <kgene@...nel.org>, linux-samsung-soc@...r.kernel.org, linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org, Andi Shyti <andi@...zian.org> Subject: Re: [PATCH v4 1/2] clk: exynos5433: do not use CLK_IGNORE_UNUSED for SPI clocks On 07/07/2016 02:13 PM, Andi Shyti wrote: > The CLK_IGNORE_UNUSED flag has to be avoided whenever possible. > Use the CLK_IS_CRITICAL flag instead for critical SPI1 clocks, > which enables the clock line during boot time. I don't agree. Both flags should be avoided. Clk is critical does not solve the problem. It is just a better workaround for lack of proper clock consumers. The IOCLK is not a critical clock. It can be disabled (e.g. when SoC is used on a board without any SPI device connected). Best regards, Krzysztof > > Suggested-by: Tomasz Figa <tomasz.figa@...il.com> > Signed-off-by: Andi Shyti <andi.shyti@...sung.com> > --- > drivers/clk/samsung/clk-exynos5433.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c > index c3a5318..337387b 100644 > --- a/drivers/clk/samsung/clk-exynos5433.c > +++ b/drivers/clk/samsung/clk-exynos5433.c > @@ -1662,7 +1662,7 @@ static struct samsung_gate_clock peric_gate_clks[] __initdata = { > ENABLE_SCLK_PERIC, 13, CLK_SET_RATE_PARENT, 0), > GATE(CLK_SCLK_IOCLK_SPI1, "sclk_ioclk_spi1", "ioclk_spi1_clk_in", > ENABLE_SCLK_PERIC, 12, > - CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0), > + CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, 0), > GATE(CLK_SCLK_IOCLK_SPI0, "sclk_ioclk_spi0", "ioclk_spi0_clk_in", > ENABLE_SCLK_PERIC, 11, CLK_SET_RATE_PARENT, 0), > GATE(CLK_SCLK_IOCLK_I2S1_BCLK, "sclk_ioclk_i2s1_bclk", > @@ -1677,7 +1677,7 @@ static struct samsung_gate_clock peric_gate_clks[] __initdata = { > GATE(CLK_SCLK_SPI2, "sclk_spi2", "sclk_spi2_peric", ENABLE_SCLK_PERIC, > 5, CLK_SET_RATE_PARENT, 0), > GATE(CLK_SCLK_SPI1, "sclk_spi1", "sclk_spi1_peric", ENABLE_SCLK_PERIC, > - 4, CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0), > + 4, CLK_SET_RATE_PARENT, 0), > GATE(CLK_SCLK_SPI0, "sclk_spi0", "sclk_spi0_peric", ENABLE_SCLK_PERIC, > 3, CLK_SET_RATE_PARENT, 0), > GATE(CLK_SCLK_UART2, "sclk_uart2", "sclk_uart2_peric", >
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