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Message-ID: <tip-38c54ccb2ded3e93d8a353baeb7b9e12e1b77e23@git.kernel.org>
Date: Fri, 8 Jul 2016 05:06:41 -0700
From: tip-bot for Borislav Petkov <tipbot@...or.com>
To: linux-tip-commits@...r.kernel.org
Cc: torvalds@...ux-foundation.org, hpa@...or.com, tony.luck@...el.com,
bp@...en8.de, peterz@...radead.org, brgerst@...il.com,
tglx@...utronix.de, bp@...e.de, linux-kernel@...r.kernel.org,
dvlasenk@...hat.com, luto@...nel.org, jpoimboe@...hat.com,
mingo@...nel.org
Subject: [tip:ras/core] x86/mce: Fix mce_rdmsrl() warning message
Commit-ID: 38c54ccb2ded3e93d8a353baeb7b9e12e1b77e23
Gitweb: http://git.kernel.org/tip/38c54ccb2ded3e93d8a353baeb7b9e12e1b77e23
Author: Borislav Petkov <bp@...e.de>
AuthorDate: Fri, 8 Jul 2016 11:09:41 +0200
Committer: Ingo Molnar <mingo@...nel.org>
CommitDate: Fri, 8 Jul 2016 11:29:26 +0200
x86/mce: Fix mce_rdmsrl() warning message
The MSR address we're dumping in there should be in hex, otherwise we
get funsies like:
[ 0.016000] WARNING: CPU: 1 PID: 0 at arch/x86/kernel/cpu/mcheck/mce.c:428 mce_rdmsrl+0xd9/0xe0
[ 0.016000] mce: Unable to read msr -1073733631!
^^^^^^^^^^^
Signed-off-by: Borislav Petkov <bp@...e.de>
Cc: Andy Lutomirski <luto@...nel.org>
Cc: Borislav Petkov <bp@...en8.de>
Cc: Brian Gerst <brgerst@...il.com>
Cc: Denys Vlasenko <dvlasenk@...hat.com>
Cc: H. Peter Anvin <hpa@...or.com>
Cc: Josh Poimboeuf <jpoimboe@...hat.com>
Cc: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: Peter Zijlstra <peterz@...radead.org>
Cc: Thomas Gleixner <tglx@...utronix.de>
Cc: Tony Luck <tony.luck@...el.com>
Link: http://lkml.kernel.org/r/1467968983-4874-5-git-send-email-bp@alien8.de
[ Fixed capitalization of 'MSR'. ]
Signed-off-by: Ingo Molnar <mingo@...nel.org>
---
arch/x86/kernel/cpu/mcheck/mce.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 92e5e37..58af630 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -425,7 +425,7 @@ static u64 mce_rdmsrl(u32 msr)
}
if (rdmsrl_safe(msr, &v)) {
- WARN_ONCE(1, "mce: Unable to read msr %d!\n", msr);
+ WARN_ONCE(1, "mce: Unable to read MSR 0x%x!\n", msr);
/*
* Return zero in case the access faulted. This should
* not happen normally but can happen if the CPU does
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