lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-ID: <1467985615-35153-1-git-send-email-lakshmis@xilinx.com>
Date:	Fri, 8 Jul 2016 19:16:55 +0530
From:	P L Sai Krishna <lakshmi.sai.krishna.potthuri@...inx.com>
To:	David Woodhouse <dwmw2@...radead.org>,
	Brian Norris <computersforpeace@...il.com>,
	Ezequiel García <ezequiel@...guardiasur.com.ar>,
	Boris Brezillon <boris.brezillon@...e-electrons.com>,
	Marek Vasut <marex@...x.de>, Jagan Teki <jteki@...nedev.com>,
	Furquan Shaikh <furquan@...gle.com>,
	Rafał Miłecki <zajec5@...il.com>,
	Cyrille Pitchen <cyrille.pitchen@...el.com>
CC:	<linux-mtd@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
	"Michal Simek" <michals@...inx.com>,
	Punnaiah Choudary Kalluri <punnaia@...inx.com>,
	Harini Katakam <harinik@...inx.com>,
	Anirudha Sarangi <anirudh@...inx.com>,
	P L Sai Krishna <lakshmis@...inx.com>
Subject: [LINUX PATCH] mtd: spi-nor: Added support for n25q00a.

Add Micron (n25q00a) 1Gbit NOR Flash in the list of supported
devices.
This part is different from n25q00 in Memory Type.
Memory Type for n25q00 - BAh
Memory Type for n25q00a - BBh

Signed-off-by: P L Sai Krishna <lakshmis@...inx.com>
---
 drivers/mtd/spi-nor/spi-nor.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index c52e455..15a6b41 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -871,6 +871,7 @@ static const struct flash_info spi_nor_ids[] = {
 	{ "n25q512a",    INFO(0x20bb20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
 	{ "n25q512ax3",  INFO(0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
 	{ "n25q00",      INFO(0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
+	{ "n25q00a",     INFO(0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
 
 	/* PMC */
 	{ "pm25lv512",   INFO(0,        0, 32 * 1024,    2, SECT_4K_PMC) },
-- 
2.1.1

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ