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Message-ID: <57834CF0.9090508@st.com>
Date:	Mon, 11 Jul 2016 09:38:24 +0200
From:	Patrice Chotard <patrice.chotard@...com>
To:	Arnd Bergmann <arnd@...db.de>
CC:	Olof Johansson <olof@...om.net>,
	Kevin Hilman <khilman@...libre.com>, <arm@...nel.org>,
	"open list:ARM/STI ARCHITECTURE" <kernel@...inux.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [GIT PULL v2] STi SoC changes for v4.8



On 07/07/2016 03:23 PM, Arnd Bergmann wrote:
> On Thursday, July 7, 2016 9:16:05 AM CEST Patrice Chotard wrote:
>> Highlights:
>> -----------
>> - Add a dummy L2 cache's write_sec callback as in non secure mode execution,
>>     we can't get access to L2 cache secure registers
>> - Cosmetics change, in case of dump_stack, update the hardware name with a
>>     more generic for the STi SoCs family
>>
> This is also based on -rc5, please send a third version rebased to -rc3 or
> earlier.

Hi Arnd

V3 will be send shortly

Thanks

Patrice

>
> 	Arnd

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