Message-Id: <1468371785-53231-1-git-send-email-fenghua.yu@intel.com>
Date:	Tue, 12 Jul 2016 18:02:33 -0700
From:	"Fenghua Yu" <fenghua.yu@...el.com>
To:	"Thomas Gleixner" <tglx@...utronix.de>,
	"Ingo Molnar" <mingo@...e.hu>,
	"H. Peter Anvin" <h.peter.anvin@...el.com>,
	"Tony Luck" <tony.luck@...el.com>, "Tejun Heo" <tj@...nel.org>,
	"Borislav Petkov" <bp@...e.de>,
	"Stephane Eranian" <eranian@...gle.com>,
	"Peter Zijlstra" <peterz@...radead.org>,
	"Marcelo Tosatti" <mtosatti@...hat.com>,
	"David Carrillo-Cisneros" <davidcc@...gle.com>,
	"Ravi V Shankar" <ravi.v.shankar@...el.com>,
	"Vikas Shivappa" <vikas.shivappa@...ux.intel.com>,
	"Sai Prakhya" <sai.praneeth.prakhya@...el.com>
Cc:	"linux-kernel" <linux-kernel@...r.kernel.org>,
	"x86" <x86@...nel.org>, "Fenghua Yu" <fenghua.yu@...el.com>
Subject: [PATCH 00/32] Enable Intel Resource Allocation in Resource Director Technology 

From: Fenghua Yu <fenghua.yu@...el.com>

L3 cache allocation allows per task control over which areas of the last
level cache are available for allocation. It is the first resource that
can be controlled as part of Intel Resource Director Technology (RDT).
This patch series creates a framework that will make it easy to add
additional resources (like L2 cache).

See Intel Software Developer manual volume 3, chapter 17 for architectural
details. Also Documentation/x86/intel_rdt.txt and
Documentation/x86/intel_rdt_ui.txt (in parts 0001 & 0013 of this patch
series).

A previous implementation used "cgroups" as the user interface. This was
rejected.

The new interface:
1) Aligns better with the h/w capabilities provided
2) Gives finer control (per thread instead of process)
3) Gives control over kernel threads as well as user threads
4) Allows resource allocation policies to be tied to certain cpus across
all contexts (tglx request)

Note that parts 1-12 are largely unchanged from what was posted last year
except for the removal of cgroup pieces and dynamic CAT/CDP switch.

Fenghua Yu (20):
  Documentation, x86: Documentation for Intel resource allocation user
    interface
  x86/cpufeatures: Get max closid and max cbm len and clean feature
    comments and code
  cacheinfo: Introduce cache id
  Documentation, ABI: Add a document entry for cache id
  x86, intel_cacheinfo: Enable cache id in x86
  drivers/base/cacheinfo.c: Export some cacheinfo functions for others
    to use
  sched.h: Add rg_list and rdtgroup in task_struct
  magic number for rscctrl file system
  x86/intel_rdt.h: Header for inter_rdt.c
  x86/intel_rdt_rdtgroup.h: Header for user interface
  x86/intel_rdt.c: Extend RDT to per cache and per resources
  Task fork and exit for rdtgroup
  x86/intel_rdt_rdtgroup.c: User interface for RDT
  x86/intel_rdt_rdtgroup.c: Create info directory
  x86/intel_rdt_rdtgroup.c: Implement rscctrl file system commands
  x86/intel_rdt_rdtgroup.c: Read and write cpus
  x86/intel_rdt_rdtgroup.c: Tasks iterator and write
  x86/intel_rdt_rdtgroup.c: Process schemas input from rscctrl interface
  MAINTAINERS: Add maintainer for Intel RDT resource allocation
  x86/Makefile: Build intel_rdt_rdtgroup.c

Vikas Shivappa (12):
  x86/intel_rdt: Cache Allocation documentation
  x86/intel_rdt: Add support for Cache Allocation detection
  x86/intel_rdt: Add Class of service management
  x86/intel_rdt: Add L3 cache capacity bitmask management
  x86/intel_rdt: Implement scheduling support for Intel RDT
  x86/intel_rdt: Hot cpu support for Cache Allocation
  x86/intel_rdt: Intel haswell Cache Allocation enumeration
  Define CONFIG_INTEL_RDT
  x86/intel_rdt: Intel Code Data Prioritization detection
  x86/intel_rdt: Adds support to enable Code Data Prioritization
  x86/intel_rdt: Class of service and capacity bitmask management for
    CDP
  x86/intel_rdt: Hot cpu update for code data prioritization

 Documentation/ABI/testing/sysfs-devices-system-cpu |   17 +
 Documentation/x86/intel_rdt.txt                    |  109 +
 Documentation/x86/intel_rdt_ui.txt                 |  268 +++
 MAINTAINERS                                        |    8 +
 arch/x86/Kconfig                                   |   12 +
 arch/x86/events/intel/cqm.c                        |   26 +-
 arch/x86/include/asm/cpufeature.h                  |    2 +
 arch/x86/include/asm/cpufeatures.h                 |   13 +-
 arch/x86/include/asm/intel_rdt.h                   |  139 ++
 arch/x86/include/asm/intel_rdt_rdtgroup.h          |  229 ++
 arch/x86/include/asm/pqr_common.h                  |   27 +
 arch/x86/include/asm/processor.h                   |    3 +
 arch/x86/kernel/cpu/Makefile                       |    2 +
 arch/x86/kernel/cpu/common.c                       |   19 +
 arch/x86/kernel/cpu/intel_cacheinfo.c              |   20 +
 arch/x86/kernel/cpu/intel_rdt.c                    |  838 ++++++++
 arch/x86/kernel/cpu/intel_rdt_rdtgroup.c           | 2230 ++++++++++++++++++++
 arch/x86/kernel/process_64.c                       |    6 +
 drivers/base/cacheinfo.c                           |    7 +-
 include/linux/cacheinfo.h                          |    5 +
 include/linux/sched.h                              |    4 +
 include/uapi/linux/magic.h                         |    2 +
 kernel/exit.c                                      |    2 +
 kernel/fork.c                                      |    4 +
 24 files changed, 3965 insertions(+), 27 deletions(-)
 create mode 100644 Documentation/x86/intel_rdt.txt
 create mode 100644 Documentation/x86/intel_rdt_ui.txt
 create mode 100644 arch/x86/include/asm/intel_rdt.h
 create mode 100644 arch/x86/include/asm/intel_rdt_rdtgroup.h
 create mode 100644 arch/x86/include/asm/pqr_common.h
 create mode 100644 arch/x86/kernel/cpu/intel_rdt.c
 create mode 100644 arch/x86/kernel/cpu/intel_rdt_rdtgroup.c

-- 
2.5.0

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