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Message-ID: <8c62e88e-aa13-a978-1b92-2fe942671c04@rock-chips.com>
Date: Wed, 13 Jul 2016 12:02:29 +0800
From: "William.wu" <William.wu@...k-chips.com>
To: Rob Herring <robh@...nel.org>
Cc: gregkh@...uxfoundation.org, balbi@...nel.org, heiko@...ech.de,
linux-rockchip@...ts.infradead.org, briannorris@...gle.com,
dianders@...gle.com, kever.yang@...k-chips.com,
huangtao@...k-chips.com, frank.wang@...k-chips.com,
eddie.cai@...k-chips.com, John.Youn@...opsys.com,
linux-kernel@...r.kernel.org, linux-usb@...r.kernel.org,
sergei.shtylyov@...entembedded.com, mark.rutland@....com,
devicetree@...r.kernel.org
Subject: Re: [PATCH v6 3/5] usb: dwc3: add phyif_utmi_quirk
Dear Rob,
On 2016/7/11 22:58, Rob Herring wrote:
> On Thu, Jul 07, 2016 at 10:54:24AM +0800, William Wu wrote:
>> Add a quirk to configure the core to support the
>> UTMI+ PHY with an 8- or 16-bit interface. UTMI+ PHY
>> interface is hardware property, and it's platform
>> dependent. Normall, the PHYIf can be configured
> s/Normall/Normally/
Yeah,I'll fix it.:-)
> s/PHYIf/PHYIF/
Refer to DWC3 controller databook, "PHY Interface" called "PHYIf",
so I describe "PHYIf" here. However, "PHYIF”seems more the norm,
I'll fix it.:-)
>
>> during coreconsultant. But for some specific usb
> s/usb/USB/
Thanks, I'll fix it.:-)
>
>> cores(e.g. rk3399 soc dwc3), the default PHYIf
>> configuration value is fault, so we need to
>> reconfigure it by software.
>>
>> And refer to the dwc3 databook, the GUSB2PHYCFG.USBTRDTIM
> s/dwc3/DWC3/
Thanks, I'll fix it too.
>
>> must be set to the corresponding value according to
>> the UTMI+ PHY interface.
> And wrap your lines at 70-74 characters.
Thanks for your suggestion, I'll pay attention to this problem next
patch.:-)
Best Regards,
William Wu
>
> Rob
>
>
>
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