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Message-ID: <tip-580cnkvftunyvt9n7unsholi@git.kernel.org>
Date:	Sat, 16 Jul 2016 13:44:23 -0700
From:	tip-bot for Arnaldo Carvalho de Melo <tipbot@...or.com>
To:	linux-tip-commits@...r.kernel.org
Cc:	acme@...hat.com, namhyung@...nel.org, cphlipot0@...il.com,
	adrian.hunter@...el.com, hpa@...or.com, tglx@...utronix.de,
	linux-kernel@...r.kernel.org, jolsa@...nel.org,
	wangnan0@...wei.com, mingo@...nel.org, dsahern@...il.com
Subject: [tip:perf/core] perf tools: Just pr_debug() about not being able to
 read cacheline_size

Commit-ID:  8811e8ea14c1056b09c794c67836b8a84584ddef
Gitweb:     http://git.kernel.org/tip/8811e8ea14c1056b09c794c67836b8a84584ddef
Author:     Arnaldo Carvalho de Melo <acme@...hat.com>
AuthorDate: Fri, 15 Jul 2016 10:05:19 -0300
Committer:  Arnaldo Carvalho de Melo <acme@...hat.com>
CommitDate: Fri, 15 Jul 2016 10:08:29 -0300

perf tools: Just pr_debug() about not being able to read cacheline_size

So far the cacheline_size is only useful for the "dcacheline" --sort
order, i.e. if that is not used, which is the norm, then the user
shouldn't care that he is running this, say, on an Android system where
sysconf(_SC_LEVEL1_DCACHE_LINESIZE) and the
/sys/devices/system/cpu/cpu0/cache/index0/coherency_line_size sysfs file
isn't available.

An upcoming patch will emit an warning only for "--sort ...,dcacheline,...".

Cc: Adrian Hunter <adrian.hunter@...el.com>
Cc: Chris Phlipot <cphlipot0@...il.com>
Cc: David Ahern <dsahern@...il.com>
Cc: Jiri Olsa <jolsa@...nel.org>
Cc: Namhyung Kim <namhyung@...nel.org>
Cc: Wang Nan <wangnan0@...wei.com>
Link: http://lkml.kernel.org/n/tip-580cnkvftunyvt9n7unsholi@git.kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@...hat.com>
---
 tools/perf/perf.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/perf/perf.c b/tools/perf/perf.c
index 4b2ff02..64c0696 100644
--- a/tools/perf/perf.c
+++ b/tools/perf/perf.c
@@ -503,7 +503,7 @@ void pthread__unblock_sigwinch(void)
 static void cache_line_size(int *cacheline_sizep)
 {
 	if (sysfs__read_int("devices/system/cpu/cpu0/cache/index0/coherency_line_size", cacheline_sizep))
-		perror("cannot determine cache line size");
+		pr_debug("cannot determine cache line size");
 }
 #endif
 

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