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Message-Id: <1468723822-30457-2-git-send-email-oss@buserror.net> Date: Sat, 16 Jul 2016 21:50:18 -0500 From: Scott Wood <oss@...error.net> To: linuxppc-dev@...ts.ozlabs.org Cc: Yangbo Lu <yangbo.lu@....com>, linux-mmc@...r.kernel.org, Arnd Bergmann <arnd@...db.de>, linux-kernel@...r.kernel.org, devicetree@...r.kernel.org, Scott Wood <oss@...error.net> Subject: [PATCH v11 1/5] dt: bindings: update Freescale DCFG compatible From: yangbo lu <yangbo.lu@....com> Update Freescale DCFG compatible with 'fsl,<chip>-dcfg' instead of 'fsl,ls1021a-dcfg' to include more chips such as ls1021a, ls1043a, and ls2080a. Signed-off-by: Yangbo Lu <yangbo.lu@....com> Acked-by: Rob Herring <robh@...nel.org> Signed-off-by: Scott Wood <oss@...error.net> --- Documentation/devicetree/bindings/arm/fsl.txt | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt index dbbc095..713c1ae 100644 --- a/Documentation/devicetree/bindings/arm/fsl.txt +++ b/Documentation/devicetree/bindings/arm/fsl.txt @@ -119,7 +119,11 @@ Freescale DCFG configuration and status for the device. Such as setting the secondary core start address and release the secondary core from holdoff and startup. Required properties: - - compatible: should be "fsl,ls1021a-dcfg" + - compatible: should be "fsl,<chip>-dcfg" + Possible compatibles: + "fsl,ls1021a-dcfg" + "fsl,ls1043a-dcfg" + "fsl,ls2080a-dcfg" - reg : should contain base address and length of DCFG memory-mapped registers Example: -- 2.7.4
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