[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <1468970566-24498-3-git-send-email-john.stultz@linaro.org>
Date: Tue, 19 Jul 2016 16:22:38 -0700
From: John Stultz <john.stultz@...aro.org>
To: lkml <linux-kernel@...r.kernel.org>
Cc: Andy Green <andy.green@...aro.org>,
Zhangfei Gao <zhangfei.gao@...aro.org>,
Jingoo Han <jg1.han@...sung.com>,
Krzysztof Kozlowski <k.kozlowski@...sung.com>,
Maxime Ripard <maxime.ripard@...e-electrons.com>,
Vinod Koul <vinod.koul@...el.com>,
Dan Williams <dan.j.williams@...el.com>,
Liam Girdwood <lgirdwood@...il.com>,
Mark Brown <broonie@...nel.org>,
Jaroslav Kysela <perex@...ex.cz>,
Takashi Iwai <tiwai@...e.com>, Wei Xu <xuwei5@...ilicon.com>,
Rob Herring <robh+dt@...nel.org>, Andy Green <andy@...mcat.com>
Subject: [RFC][PATCH 02/10 v2] k3dma: Fix dma err offsets
From: Andy Green <andy.green@...aro.org>
The offsets for ERR1 and ERR2 are wrong actually.
That's why you can never clear an error.
Cc: Zhangfei Gao <zhangfei.gao@...aro.org>
Cc: Jingoo Han <jg1.han@...sung.com>
Cc: Krzysztof Kozlowski <k.kozlowski@...sung.com>
Cc: Maxime Ripard <maxime.ripard@...e-electrons.com>
Cc: Vinod Koul <vinod.koul@...el.com>
Cc: Dan Williams <dan.j.williams@...el.com>
Cc: Liam Girdwood <lgirdwood@...il.com>
Cc: Mark Brown <broonie@...nel.org>
Cc: Jaroslav Kysela <perex@...ex.cz>
Cc: Takashi Iwai <tiwai@...e.com>
Cc: Wei Xu <xuwei5@...ilicon.com>
Cc: Rob Herring <robh+dt@...nel.org>
Cc: Andy Green <andy@...mcat.com>
Acked-by: Zhangfei Gao <zhangfei.gao@...aro.org>
Signed-off-by: Andy Green <andy.green@...aro.org>
[jstultz: Forward ported to mainline]
Signed-off-by: John Stultz <john.stultz@...aro.org>
---
drivers/dma/k3dma.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/dma/k3dma.c b/drivers/dma/k3dma.c
index d01a11d..8dd050c 100644
--- a/drivers/dma/k3dma.c
+++ b/drivers/dma/k3dma.c
@@ -34,8 +34,8 @@
#define INT_ERR1_MASK 0x20
#define INT_ERR2_MASK 0x24
#define INT_TC1_RAW 0x600
-#define INT_ERR1_RAW 0x608
-#define INT_ERR2_RAW 0x610
+#define INT_ERR1_RAW 0x610
+#define INT_ERR2_RAW 0x618
#define CH_PRI 0x688
#define CH_STAT 0x690
#define CX_CUR_CNT 0x704
--
1.9.1
Powered by blists - more mailing lists