linux-kernel - Re: [PATCH] AHCI: Clear GHC.IS to prevent unexpectly asserting INTx

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [day] [month] [year] [list]

Message-ID: <20160720151127.GA4574@htj.duckdns.org>
Date:	Wed, 20 Jul 2016 11:11:27 -0400
From:	"tj@...nel.org" <tj@...nel.org>
To:	Pang Raymond <Raymond_rule@...mail.com>
Cc:	ide linux <linux-ide@...r.kernel.org>,
	kernel linux <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] AHCI: Clear GHC.IS to prevent unexpectly asserting INTx

On Wed, Jul 20, 2016 at 12:13:46PM +0000, Pang Raymond wrote:
> 
> Due to PCI subsystem behaviour, unloading AHCI driver will disable 
> MSI and enable INTx. When HBA supports MSIx or Multiple MSI, Driver's
> irq handler doesn't clear GHC.IS register. It works well when reading or
> writing data and GHC.IS is always non-zero. But when unloading driver
> (or any other operation which causes disable MSIx and enable INTx), PCI
>  subsystem uses config write(Rx04.bit10) to enable INTx. Because
> GHC.IS is non-zero, HBA will falsely assume some port needs interrupt 
> service. Then it asserts INTx. To make things worse, when AHCI controller
> shares the same interrupt pin with other PCI device, that PCI device's ISR
> will be called and nobody de-asserts previous INTx.
> This patch clears GHC.IS in ahci_port_stop() even when using MSIx or 
> MMSI to prevent this case. It ensures GHC.IS is zero before PCI subsystem 
> enables INTx.
> 
> Signed-off-by: Raymond Pang <raymond_rule@...mail.com>

Applied to libata/for-4.8 with minor updates to the comment.

Thanks.

-- 
tejun