linux-kernel - Re: [PATCH v6 1/8] Documentation: arm: define DT cpu capacity-dmips-mhz bindings

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Message-ID: <20160720185607.GA30072@rob-hp-laptop>
Date:	Wed, 20 Jul 2016 13:56:07 -0500
From:	Rob Herring <robh@...nel.org>
To:	Juri Lelli <juri.lelli@....com>
Cc:	linux-kernel@...r.kernel.org, linux-pm@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
	peterz@...radead.org, vincent.guittot@...aro.org,
	mark.rutland@....com, linux@....linux.org.uk, sudeep.holla@....com,
	lorenzo.pieralisi@....com, catalin.marinas@....com,
	will.deacon@....com, morten.rasmussen@....com,
	dietmar.eggemann@....com, broonie@...nel.org,
	Pawel Moll <pawel.moll@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Maxime Ripard <maxime.ripard@...e-electrons.com>,
	Olof Johansson <olof@...om.net>,
	Gregory CLEMENT <gregory.clement@...e-electrons.com>,
	Paul Walmsley <paul@...an.com>,
	Linus Walleij <linus.walleij@...aro.org>,
	Chen-Yu Tsai <wens@...e.org>,
	Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>
Subject: Re: [PATCH v6 1/8] Documentation: arm: define DT cpu
 capacity-dmips-mhz bindings

On Tue, Jul 19, 2016 at 01:40:41PM +0100, Juri Lelli wrote:
> ARM systems may be configured to have cpus with different power/performance
> characteristics within the same chip. In this case, additional information
> has to be made available to the kernel (the scheduler in particular) for it
> to be aware of such differences and take decisions accordingly.
> 
> Therefore, this patch aims at standardizing cpu capacities device tree
> bindings for ARM platforms. Bindings define cpu capacity-dmips-mhz
> parameter, to allow operating systems to retrieve such information from
> the device tree and initialize related kernel structures, paving the way
> for common code in the kernel to deal with heterogeneity.
> 
> Cc: Rob Herring <robh+dt@...nel.org>
> Cc: Pawel Moll <pawel.moll@....com>
> Cc: Mark Rutland <mark.rutland@....com>
> Cc: Ian Campbell <ijc+devicetree@...lion.org.uk>
> Cc: Kumar Gala <galak@...eaurora.org>
> Cc: Maxime Ripard <maxime.ripard@...e-electrons.com>
> Cc: Olof Johansson <olof@...om.net>
> Cc: Gregory CLEMENT <gregory.clement@...e-electrons.com>
> Cc: Paul Walmsley <paul@...an.com>
> Cc: Linus Walleij <linus.walleij@...aro.org>
> Cc: Chen-Yu Tsai <wens@...e.org>
> Cc: Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>
> Cc: devicetree@...r.kernel.org
> Signed-off-by: Juri Lelli <juri.lelli@....com>
> ---
> 
> Changes from v1:
>  - removed section regarding capacity-scale
>  - added information regarding normalization
> 
> Changes from v4:
>  - binding changed to capacity-dmips-mhz
>  - sections and changelod updated accordingly
> 
> Changes from v5:
>  - addressed Mark and Vincent comments
> ---
>  .../devicetree/bindings/arm/cpu-capacity.txt       | 236 +++++++++++++++++++++
>  Documentation/devicetree/bindings/arm/cpus.txt     |  10 +
>  2 files changed, 246 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/arm/cpu-capacity.txt

I guess I'm okay with the scaled values, so:

Acked-by: Rob Herring <robh@...nel.org>

[...]

> +Example 2 (ARM 32-bit, 4-cpu system, two clusters,
> +	   cpus 0,1@...z, cpus 2,3@...MHz):
> +capacities-dmips-mhz are scaled w.r.t. 2 (cpu@0 and cpu@1), this means that first
> +cpu@0 and cpu@1 are twice fast than cpu@2 and cpu@3 (at the same frequency)

This example is a bit confusing with both the capacity and frequency 
being half. I also find it a bit unrealistic to have a 2x performance 
difference on the same micro arch. But it is all just an example...

Rob