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Message-Id: <20160719.194220.1605569742108600970.davem@davemloft.net>
Date:	Tue, 19 Jul 2016 19:42:20 -0700 (PDT)
From:	David Miller <davem@...emloft.net>
To:	vivien.didelot@...oirfairelinux.com
Cc:	netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
	kernel@...oirfairelinux.com, andrew@...n.ch, f.fainelli@...il.com
Subject: Re: [PATCH net-next v3 00/12] net: dsa: mv88e6xxx: Global2 cleanup
 and STP

From: Vivien Didelot <vivien.didelot@...oirfairelinux.com>
Date: Mon, 18 Jul 2016 20:45:28 -0400

> The Marvell switches registers are organized in distinct internal SMI
> devices, such as PHY, Port, Global 1 or Global 2 registers sets.
> 
> Since not all chips support every registers sets or have slightly
> differences in them (such as old 88E6060 or new 88E6390 likely to be
> supported soon), make the setup code clearer now by removing a few
> family checks and adding flags to describe the Global 2 registers map.
> 
> This patchset enables basic STP support and bridging on most chips when
> getting rid of a few inconsistencies in chip descriptions (patch 1) and
> add bridge Ageing Time support to DSA and the mv88e6xxx driver.

Series applied.

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