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Message-Id: <1469105055-25181-12-git-send-email-jaz@semihalf.com>
Date: Thu, 21 Jul 2016 14:44:07 +0200
From: Grzegorz Jaszczyk <jaz@...ihalf.com>
To: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org
Cc: robh+dt@...nel.org, mark.rutland@....com, jason@...edaemon.net,
andrew@...n.ch, sebastian.hesselbarth@...il.com,
linux@...linux.org.uk, thomas.petazzoni@...e-electrons.com,
gregory.clement@...e-electrons.com, mw@...ihalf.com,
jaz@...ihalf.com, alior@...vell.com
Subject: [PATCH 10/18] ARM: mvebu: a39x: enable watchdog for all Armada-39x SoCs
Signed-off-by: Grzegorz Jaszczyk <jaz@...ihalf.com>
Reviewed-by: Lior Amsalem <alior@...vell.com>
---
arch/arm/boot/dts/armada-39x.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/armada-39x.dtsi b/arch/arm/boot/dts/armada-39x.dtsi
index 03dc0ec..5e01438 100644
--- a/arch/arm/boot/dts/armada-39x.dtsi
+++ b/arch/arm/boot/dts/armada-39x.dtsi
@@ -322,6 +322,14 @@
clock-names = "nbclk", "fixed";
};
+ watchdog@...00 {
+ compatible = "marvell,armada-380-wdt";
+ reg = <0x20300 0x34>, <0x20704 0x4>,
+ <0x18260 0x4>;
+ clocks = <&coreclk 2>, <&refclk>;
+ clock-names = "nbclk", "fixed";
+ };
+
cpurst@...00 {
compatible = "marvell,armada-370-cpu-reset";
reg = <0x20800 0x10>;
@@ -534,5 +542,12 @@
#clock-cells = <0>;
clock-frequency = <1000000000>;
};
+
+ /* 25 MHz reference crystal */
+ refclk: oscillator {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ };
};
};
--
1.8.3.1
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