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Message-Id: <1469105055-25181-10-git-send-email-jaz@semihalf.com>
Date:	Thu, 21 Jul 2016 14:44:05 +0200
From:	Grzegorz Jaszczyk <jaz@...ihalf.com>
To:	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org
Cc:	robh+dt@...nel.org, mark.rutland@....com, jason@...edaemon.net,
	andrew@...n.ch, sebastian.hesselbarth@...il.com,
	linux@...linux.org.uk, thomas.petazzoni@...e-electrons.com,
	gregory.clement@...e-electrons.com, mw@...ihalf.com,
	jaz@...ihalf.com, alior@...vell.com
Subject: [PATCH 08/18] ARM: mvebu: a39x: Enable PMU, CA9 MPcore SoC Controller and Coherency fabric

This commit enables:
- CA9's Performance Monitor Unit
- CA9 MPcore SoC Controller
- Coherency fabric
on Armada 39x, basing on the Armada 38x (which has the same CA9 CPU).

Signed-off-by: Grzegorz Jaszczyk <jaz@...ihalf.com>
Reviewed-by: Lior Amsalem <alior@...vell.com>
---
 arch/arm/boot/dts/armada-39x.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm/boot/dts/armada-39x.dtsi b/arch/arm/boot/dts/armada-39x.dtsi
index cb66f20..8a22c02 100644
--- a/arch/arm/boot/dts/armada-39x.dtsi
+++ b/arch/arm/boot/dts/armada-39x.dtsi
@@ -78,6 +78,11 @@
 		};
 	};
 
+	pmu {
+		compatible = "arm,cortex-a9-pmu";
+		interrupts-extended = <&mpic 3>;
+	};
+
 	soc {
 		compatible = "marvell,armada390-mbus", "marvell,armadaxp-mbus",
 			     "simple-bus";
@@ -322,6 +327,16 @@
 				reg = <0x20800 0x10>;
 			};
 
+			mpcore-soc-ctrl@...20 {
+				compatible = "marvell,armada-380-mpcore-soc-ctrl";
+				reg = <0x20d20 0x6c>;
+			};
+
+			coherency-fabric@...10 {
+				compatible = "marvell,armada-380-coherency-fabric";
+				reg = <0x21010 0x1c>;
+			};
+
 			pmsu@...00 {
 				compatible = "marvell,armada-390-pmsu",
 					     "marvell,armada-380-pmsu";
-- 
1.8.3.1

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