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Message-Id: <1469178440-4668-4-git-send-email-hl@rock-chips.com>
Date:	Fri, 22 Jul 2016 17:07:16 +0800
From:	Lin Huang <hl@...k-chips.com>
To:	heiko@...ech.de
Cc:	mark.yao@...k-chips.com, myungjoo.ham@...sung.com,
	cw00.choi@...sung.com, airlied@...ux.ie, mturquette@...libre.com,
	dbasehore@...omium.org, sboyd@...eaurora.org,
	linux-kernel@...r.kernel.org, dri-devel@...ts.freedesktop.org,
	dianders@...omium.org, linux-rockchip@...ts.infradead.org,
	kyungmin.park@...sung.com, linux-arm-kernel@...ts.infradead.org,
	tixy@...aro.org, xsf@...k-chips.com, typ@...k-chips.com,
	Lin Huang <hl@...k-chips.com>
Subject: [PATCH v3 3/7] clk: rockchip: rk3399: add SCLK_DDRCLK ID for ddrc

Signed-off-by: Lin Huang <hl@...k-chips.com>
---
Changes in v3:
-None

Changes in v2:
- None 
Changes in v1:
- None

 include/dt-bindings/clock/rk3399-cru.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/dt-bindings/clock/rk3399-cru.h b/include/dt-bindings/clock/rk3399-cru.h
index 50a44cf..8a0f0442 100644
--- a/include/dt-bindings/clock/rk3399-cru.h
+++ b/include/dt-bindings/clock/rk3399-cru.h
@@ -131,6 +131,7 @@
 #define SCLK_DPHY_RX0_CFG		165
 #define SCLK_RMII_SRC			166
 #define SCLK_PCIEPHY_REF100M		167
+#define SCLK_DDRCLK			168
 
 #define DCLK_VOP0			180
 #define DCLK_VOP1			181
-- 
2.6.6

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