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Message-ID: <CACRpkda7RC6mpLgXLk46PxPFH1SJii-2RHFTyt9EZJWm2OHJTA@mail.gmail.com>
Date: Fri, 22 Jul 2016 16:48:35 +0200
From: Linus Walleij <linus.walleij@...aro.org>
To: Ray Jui <ray.jui@...adcom.com>
Cc: Alexandre Courbot <gnurou@...il.com>,
Rob Herring <robh+dt@...nel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
bcm-kernel-feedback-list <bcm-kernel-feedback-list@...adcom.com>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
Pramod Kumar <pramodku@...adcom.com>
Subject: Re: [PATCH v4 2/2] pinctrl: iproc: Add NSP and Stingray GPIO support
On Mon, Jul 18, 2016 at 7:20 PM, Ray Jui <ray.jui@...adcom.com> wrote:
> The iProc GPIO controller is shared among multiple iProc based SoCs.
> In the NSP integration, the drive strength pinctrl function is
> disabled. In the integration of Stingray, pinctrl is handled by another
> block and this GPIO controller is solely used as a GPIO controller, and
> therefore should not be registered to the pinconf framework
>
> This patch introduces new SoC specific compatible strings
> "brcm,iproc-nsp-gpio" for NSP with drive strength feature disabled and
> "brcm,iproc-stingray-gpio" for Stingray with all PINCONF features
> disabled
>
> This patch is developed based on the initial work from Yendapally
> Reddy Dhananjaya <yendapally.reddy@...adcom.com> who attempted to
> disable drive strength configuration for the iProc based NSP chip. In
> addition, Pramod Kumar <pramod.kumar@...adcom.com> also contributed to
> make the support more generic across all currently supported PINCONF
> functions in the iProc GPIO/PINCONF driver
>
> Signed-off-by: Pramod Kumar <pramodku@...adcom.com>
> Signed-off-by: Ray Jui <ray.jui@...adcom.com>
Patch applied. I see no reason to hold it back, if it survives the
test builds.
Yours,
Linus Walleij
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